8
LTC3564
3564f
(Refer to Functional Diagram)
Main Control Loop
The LTC3564 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal. During normal operation, the internal top
power MOSFET is turned on each cycle when the oscillator
sets the RS latch, and turned off when the current com-
parator, I
COMP
, resets the RS latch. The peak inductor
current at which I
COMP
resets the RS latch, is controlled by
the output of error amplifier EA. When the load current
increases, it causes a slight decrease in the feedback
voltage, FB, relative to the 0.6V reference, which in turn,
causes the EA amplifier’s output voltage to increase until
the average inductor current matches the new load cur-
rent. While the top MOSFET is off, the bottom MOSFET is
turned on until either the inductor current starts to reverse,
as indicated by the current reversal comparator I
RCMP
, or
the beginning of the next clock cycle.
Burst Mode Operation
The LTC3564 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand.
In Burst Mode operation, the peak current of the inductor
is set to approximately 180mA regardless of the output
load. Each burst event can last from a few cycles at light
loads to almost continuously cycling with short sleep
intervals at moderate loads. In between these burst events,
the power MOSFETs and any unneeded circuitry are turned
off, reducing the quiescent current to 20μA. In this sleep
state, the load current is being supplied solely from the
output capacitor. As the output voltage droops, the EA
amplifier’s output rises above the sleep threshold signal-
ing the BURST comparator to trip and turn the top MOSFET
on. This process repeats at a rate that is dependent on the
load demand.
Short-Circuit Protection
When the output is shorted to ground, the inductor current
may exceed the maximum inductor peak current if not
allowed enough time to decay. To prevent the inductor
current from running away, the bottom N-channel MOSFET
is allowed to stay on for more than one cycle, thereby
allowing the inductor current time to decay.
Dropout Operation
As the input supply voltage decreases to a value approach-
ing the output voltage, the duty cycle increases toward the
maximum on-time. Further reduction of the supply voltage
forces the main switch to remain on for more than one cycle
until it reaches 100% duty cycle. The output voltage will then
be determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
An important detail to remember is that at low input supply
voltages, the R
DS(ON)
of the P-channel switch increases
(see Typical Performance Characteristics). Therefore, the
user should calculate the power dissipation when the
LTC3564 is used at 100% duty cycle with low input voltage
(See Thermal Considerations in the Applications Informa-
tion section).
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3564 uses a
patented scheme that counteracts this compensating ramp,
which allows the maximum inductor peak current to
remain unaffected throughout all duty cycles.
OPERATIO
U
