UG-006 Evaluation Board User Guide
Rev. 0 | Page 4 of 8
CLOCK INPUT CONFIGURATION
The clock inputs of the ADCLK905/ADCLK907/ADCLK925
on the evaluation board are dc-coupled to the SMA connectors.
Therefore, the user must ac-couple the clock source, or the
clock source must supply the appropriate dc common-mode
voltage with adequate input swing.
It is recommended that the clock source be ac-coupled and
that V
REF
x and V
T
x be tied together. For single-ended operation,
ac-couple the unused input to ground with a 0.1 μF capacitor.
For more information about input configurations, refer to the
data sheet for the ADCLK905/ADCLK907/ADCLK925.
Figure 3 to Figure 5 show block diagrams for the three devices.
D
D
Q
Q
V
CC
V
EE
V
T
REF
8182-003
Figure 3. ADCLK905 1:1 Clock/Data Buffer
D1
D1
Q1
V
CC
V
EE
V
T
1
Q1
REF
1
D2
Q2
V
CC
V
EE
V
T
2
D2
V
REF
2
Q2
08182-004
Figure 4. ADCLK907 Dual 1:1 Clock/Data Buffer
D
D
V
CC
V
EE
V
T
REF
Q1
Q1
Q2
Q2
08182-005
Figure 5. ADCLK925 1:2 Clock/Data Fanout Buffer
Table 2. Jumper Connections
Jumper ADCLK905/ADCLK925 ADCLK907
TP1 (GND) Connect to GND Connect to GND
TP2 (VCC) Connect to 2.0 V Connect to 2.0 V
TP3 (VEE) Connect to −1.3 V Connect to −1.3 V
TP4 (GND) Connect to GND Connect to GND
TP5 (VREF1) Short T5 and T6 for input ac coupling, else no connection Short T5 and T6 for input ac coupling, else no connection
TP6 (VT1) Short T5 and T6 for input ac coupling, else no connection Short T5 and T6 for input ac coupling, else no connection
TP7 (VT2) No connection Short T7 and T8 for input ac coupling, else no connection
TP8 (VREF2) No connection Short T7 and T8 for input ac coupling, else no connection
