IDT71T016SA12PH8

JULY 2008
DSC-5326/02
1
2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
©
Features
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
Commercial: 10/12/15/20ns
Industrial: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 2.5V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball
Plastic FBGA packages
Description
The IDT71T016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-performance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71T016 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71T016 are LVTTL-compatible and operation is from a
single 2.5V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
Functional Block Diagram
2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
IDT71T016SA
6.422
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit) Commercial and Industrial Temperature Ranges
123456
A
BLE OE
A
0
A
1
A
2
NC
BI/O
8
BHE
A
3
A
4
CS
I/O
0
CI/O
9
I/O
10
A
5
A
6
I/O
1
I/O
2
DV
SS
I/O
11
NC A
7
I/O
3
V
DD
EV
DD
I/O
12
NC NC I/O
4
V
SS
FI/O
14
I/O
13
A
14
A
15
I/O
5
I/O
6
GI/O
15
NC A
12
A
13
WE
I/O
7
HNC A
8
A
9
A
10
A
11
NC
5326 tbl 02a
Pin Configurations
TSOP
Top View
Pin Description
Truth Table
(1)
NOTE:
1. H = VIH, L = VIL, X = Don't care.
A
0
– A
15
Address Inputs Input
CS
Chip Select Input
WE
Write Enable Input
OE
Output Enable Input
BHE High Byte Enable Input
BLE Low Byte Enable Input
I/O
0
– I/O
15
Data Input/Output I/O
V
DD
2.5V Power Power
V
SS
Ground Gnd
5326 tbl 01
CS OE WE BLE BHE
I/O
0
-I/O
7
I/O
8
-I/O
15
Function
H X X X X High-Z High-Z Deselected – Standby
LLH L H DATA
OUT
High-Z Low Byte Read
L L H H L High-Z DATA
OUT
High Byte Read
LLH L L DATA
OUT
DATA
OUT
Word Read
LXL L L DATA
IN
DATA
IN
Word Write
LXL L H DATA
IN
High-Z Low Byte Write
LXL H L High-Z DATA
IN
High Byte Write
L H H X X High-Z High-Z Outputs Disabled
L X X H H High-Z High-Z Outputs Disabled
5326 tbl 02
FBGA (BF48-1)
Top View
6.42
3
IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit) Commercial and Industrial Temperature Ranges
Parameter
71T016SA10 71T016SA12 71T016SA15 71T016SA20
Symbol Com'l Com'l Ind Com'l Ind Com'l Ind Unit
I
CC
Dynamic Operating Current
CS < V
LC
,
Outputs Open, V
DD
= Max., f = f
MAX
(3)
Max. 160 150 160 130 130 120 120
mA
Typ.
(4)
90 85
____
80
____
80
____
I
SB
Dynamic Standby Power Supply Current
CS > V
HC
,
Outputs Open, V
DD
= Max., f = f
MAX
(3)
45 40 45 35 35 30 30 mA
I
SB
1
Full Standby Power Supply Current (static)
CS > V
HC
,
Outputs Open, V
DD
= Max., f = 0
(3)
10 15 15 15 15 15 15 mA
5326 tbl 8
Absolute Maximum Ratings
(1)
Recommended Operating
Temperature and Supply Voltage
DC Electrical Characteristics
(VDD = Min. to Max., Commercial and Industrial Temperature Ranges)
Capacitance
(TA = +25°C, f = 1.0MHz)
Recommended DC Operating
Conditions
DC Electrical Characteristics
(1,2)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and VDD – 0.2V (High).
3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing .
4. Typical values are measured at 2.5V, 25°C and with equal read and write cycles. This parameter is guaranteed by device characterization but is not production
tested.
Symbol Rating Value Unit
V
DD
Supply Voltage Relative
to V
SS
–0.3 to +3.6 V
V
IN
, V
OUT
Terminal Voltage Relative
to V
SS
–0.3 to V
DD
+0.3 V
T
BIAS
Temperature Under Bias –55 to +125
o
C
T
STG
Storage Temperature 55 to +125
o
C
P
T
Power Dissipation 1.25 W
I
OUT
DC Output Current 50 mA
5326 tbl 03
Grade Temperature V
SS
V
DD
Commercial 0°C to +70°C 0V See Below
Industrial -40°C to +85°C 0V See Below
5326 tbl 04
Symbol Parameter Min. Typ. Max. Unit
V
DD
Supply Voltage 2.375 2.5 2.625 V
Vss Ground 0 0 0 V
V
IH
Input High Voltage 1.7
____
V
DD
+0.3
(1)
V
V
IL
Input Low Voltage 0.3
(2) ____
0.7 V
5326 tbl 05
Symbol Parameter
(1)
Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 6 pF
C
I/O
I/O Capacitance V
OUT
= 3dV 7 pF
5326 tbl 06
Symbol Parameter Test Condition
IDT71T016SA
UnitMin. Max.
|I
LI
| Input Leakage Current V
DD
= Max., V
IN
= V
SS
to V
DD
___
A
|I
LO
| Output Leakage Current V
DD
= Max., CS = V
IH
, V
OUT
= V
SS
to V
DD
___
A
V
OL
Output Low Voltage I
OL
= 2.0mA, V
DD
= Min.
___
0.7 V
V
OH
Output High Voltage I
OH
= 2.0mA, V
DD
= Min. 1.7
___
V
5326 tbl 07
NOTES:
1. VIH (max) = VDD + 1.0V a.c. (pulse width less than tCYC/2) for I < 20 mA, once
per cycle.
2. VIL (min) = -1.0V a.c. (pulse width less than tCYC/2) for I < 20 mA, once per cycle.

IDT71T016SA12PH8

Mfr. #:
Manufacturer:
Description:
IC SRAM 1M PARALLEL 44TSOP II
Lifecycle:
New from this manufacturer.
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