PHK04P02T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 14 December 2010 6 of 12
NXP Semiconductors
PHK04P02T
P-channel vertical D-MOS logic level FET
T
j
= 25 °C T
j
= 25 °C
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6. Drain-source on-state resistance as a function
of drain current; typical values
V
DS
> I
D
x R
DSon
V
DS
> I
D
x R
DSon
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 8. Forward transconductance as a function of
drain current; typical values
I
D
= 1 mA; V
DS
= V
GS
Fig 9. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig 10. Gate-source threshold voltage as a function of
junction temperature
−2
−3
−1
−4
−5
I
D
(A)
0
V
DS
(V)
0 −2.0−1.5−0.5 −1.0
001aam077
V
GS
(V) = −0.8
−1.3
−1.2
−1.1
−1.0
−0.9
−4.5
−2.5
−1.8
0
0.5
0.3
0.1
0.7
0.4
0.2
0.6
R
DS(on)
(Ω)
I
D
(A)
0 −5−4−2 −3−1
001aam078
V
GS
(V) = −1.3
−0.8 −1.2
−1.1
−1.0
−0.9
−1.8
−2.5
−4.5
−2
−3
−1
−4
−5
I
D
(A)
0
V
GS
(V)
0 −2.0−1.5−0.5 −1.0
001aam079
T
j
= 150 °CT
j
= 25 °C
0
6
4
2
8
g
fs
(S)
001aam080
I
D
(A)
0 −2.4−1.6−0.8
T
j
= 150 °C
T
j
= 25 °C
001aam081
T
j
(°C)
0 15010050
1.0
1.2
0.8
1.4
1.6
0.6
V
GS
= −4.5 V
a
−2.5 V
−1.8 V
001aam082
T
j
(°C)
0 15010050
0
0.6
0.4
0.2
0.8
V
GS(th)
(V)
minimum
typical
