3
FN3182.9
July 22, 2013
Absolute Maximum Ratings Thermal Information
Supply Voltage (Note 5). . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +18V
Output Voltages OUT1 and OUT2 . . . . . . . . . . . . . . . .-0.3V to +18V
(with respect to GND) (Note 5)
Output Voltages HYST1 and HYST2 . . . . . . . . . . . . . .-0.3V to +18V
(with respect to V+) (Note 5)
Input Voltages SET1 and SET2 . . . . . (GND -0.3V) to (V+ V- +0.3V)
(Note 5)
Maximum Sink Output OUT1 and OUT2 . . . . . . . . . . . . . . . . . 25mA
Maximum Source Output Current
HYST1 and HYST2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25mA
Operating Conditions
Temperature Range
ICL7665SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ICL7665SI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Thermal Resistance (Typical, Note 4) θ
JA
(°C/W)
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . +150°C
Maximum Junction Temperature (CERDIP). . . . . . . . . . . . . . +175°C
Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-F reeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
5. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to voltages greater than (V+
+0.3V) or less than (GND - 0.3V) may cause destructive device latchup. For these reasons, it is recommended that no inputs from external
sources not operating from the same power supply be applied to the device before its supply is established, and that in multiple supply systems,
the supply to the ICL7665S be turned on first. If this is not possible, current into inputs and/or outputs must be limited to ±0.5mA and voltages
must not exceed those defined above.
Electrical Specifications The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, T
A
= +25°C,
Test Circuit Figure 7. Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage V+ ICL7665S T
A
= +25°C1.6-16V
0°C ≤ T
A
≤ +70°C1.8-16V
-25°C ≤ T
A
≤ +85°C1.8-16V
ICL7665SA 0°C ≤ T
A
≤ +70°C1.8-16V
-25°C ≤ T
A
≤ +85°C1.8-16V
Supply Current I+ GND ≤ V
SET1
, V
SET2
≤ V+, All Outputs Open Circuit
0°C ≤ T
A
≤ +70°C V+ = 2V - 2.5 10 µA
V+ = 9V - 2.6 10 µA
V+ = 15V - 2.9 10 µA
-40°C ≤ T
A
≤ +85°C V+ = 2V - 2.5 10 µA
V+ = 9V - 2.6 10 µA
V+ = 15V - 2.9 10 µA
Input Trip Voltage V
SET1
ICL7665S 1.20 1.30 1.40 V
V
SET2
1.20 1.30 1.40 V
V
SET1
ICL7665SA 1.275 1.30 1.325 V
V
SET2
1.275 1.30 1.325 V
Temperature Coefficient of
V
SET
ΔV
SET
ΔT
ICL7665S - 200 - ppm
ICL7665SA - 100 - ppm
Supply Voltage Sensitivity of
V
SET1
, V
SET2
ΔV
SET
ΔV
S
R
OUT1
, R
OUT2
, R
HYST1
, R
2HYST2
= 1MΩ,
2V ≤ V+ ≤ 10V
-0.03-%/V
ICL7665S
