7
FN3182.9
July 22, 2013
Detailed Description
As shown in the Functional Diagram, the ICL7665S consists
of two comparators which compare input voltages on the
SET1 and SET2 terminals to an internal 1.3V bandgap
reference. The outputs from the two comparators drive
open-drain N-channel transistors for OUT1 and OUT2, and
open-drain P-channel transistors for HYST1 and HYST2
outputs. Each section, the Undervoltage Detector and the
Overvoltage Detector, is independent of the other, although
both use the internal 1.3V reference. The offset voltages of
the two comparators will normally be unequal so V
SET1
will
generally not quite equal V
SET2
.
The input impedance of the SET1 and SET2 pins are
extremely high, and for most practical applications can be
ignored. The four outputs are open-drain MOS transistors,
and when ON behave as low resistance switches to their
respective supply rails. This minimizes errors in setting up
the hysteresis, and maximizes the output flexibility. The
operating currents of the bandgap reference and the
comparators are around 100nA each.
Precautions
Junction isolated CMOS devices like the ICL7665S have an
inherent SCR or 4-layer PNPN structure distributed throughout
the die. Under certain circumstances, this can be triggered into
a potentially destructive high current mode. This latchup can be
triggered by forward-biasing an input or output with respect to
the power supply, or by applying excessive supply voltages. In
very low current analog circuits, such as the ICL7665S, this
SCR can also be triggered by applying the input power supply
extremely rapidly (“instantaneously”), e.g., through a low
impedance battery and an ON/OFF switch with short lead
lengths. The rate-of-rise of the supply voltage can exceed
100V/μs in such a circuit. A low impedance capacitor (e.g.,
0.05μF disc ceramic) between the V+ and GND pins of the
ICL7665S can be used to reduce the rate-of-rise of the supply
voltage in battery applications. In line operated systems, the
rate-of-rise of the supply is limited by other considerations, and
is normally not a problem.
If the SET voltages must be applied before the supply voltage
V+, the input current should be limited to less than 0.5mA by
appropriate external resistors, usually required for voltage
setting anyway. A similar precaution should be taken with the
outputs if it is likely that they will be driven by other circuits to
levels outside the supplies at any time.
Additionally, with a V+ supply that has ringing or drooping after
power up, a false transition on the OUTx output may occur
even though the resistor programmed threshold voltage is not
encroached upon. This occurs as the internal bandgap circuit
time constant, on the order of a microsecond is matched by the
V+ transient. If this occurs connecting a 1
μF to the SETx pin will
eliminate the OUTx false transition as the additional
capacitance moves the external time constant three orders of
magnitude above the internal time constant.
Simple Threshold Detector
Figure 9 shows the simplest connection of the ICL7665S for
threshold detection. From the graph 9B, it can be seen that
at low input voltage OUT1 is OFF, or high, while OUT2 is
ON, or low. As the input rises (e.g., at power-on) toward
V
NOM
(usually the eventual operating voltage), OUT2 goes
high on reaching V
TR2
. If the voltage rises above V
NOM
as
much as V
TR1
, OUT1 goes low. The Equations are giving
V
SET1
and V
SET2
are from Figure 9A:
Since the voltage to trip each comparator is nominally 1.3V,
the value V
IN
for each trip point can be found from
and
1
2
3
4
8
7
6
5
OUT1
HYST1
SET1
GND
V+
OUT2
SET2
HYST2
INPUT
HYST2
OUT2
OUT1
V+
20
kΩ
12
pF
12
pF
12
pF
12
pF
20
kΩ
4.7kΩ
HYST1
4.7
kΩ
1.0V
1.6V
FIGURE 7. TEST CIRCUITS
V
SET1
,
V
SET2
t
SO1D
t
O1F t
SO1D
t
O1R
t
SH1D
t
H1R
t
SH1D
t
H1F
t
SO2D
t
O2R
t
SO2D
t
O2F
t
SH2
D
t
H2R
t
SH2D
t
H2F
1.6V
1.0V
V+
GND
GND
GND
GND
(5V)
V+
(5V)
V+
(5V)
V+
(5V)
INPUT
OUT1
HYST1
OUT2
HYST2
FIGURE 8. SWITCHING WAVEFORMS
V
SET1
V
IN
R
11
R
11
R
21
+()
------------------------------- -
= V
SET2
V
IN
R
12
R
12
R
22
+()
------------------------------- -
=
V
TR1
V
SET1
R
11
R
21
+()
R
11
----------------------------------
1.3
R
11
R
21
+()
R
11
----------------------------------
for detector 1==
V
TR2
V
SET2
R
12
R
22
+()
R
12
----------------------------------
1.3
R
12
R
22
+()
R
12
----------------------------------
for detector 2==
ICL7665S
