MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
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Detailed Description
The MAX5741 contains four 10-bit, voltage-output, low-
power digital-to-analog converters (DACs). Each DAC
employs a resistor word string architecture that con-
verts a 10-bit digital input word to an equivalent analog
output voltage proportional to the applied reference
voltage. The MAX5741 shares one reference input
(REF) between all four DACs. The MAX5741 includes
rail-to-rail output buffer amplifiers for each DAC, and
input logic for simple microprocessor (µP), and CMOS
interfaces. The power-supply range is from +2.7V to
+5.5V (
Functional Diagram
). The MAX5741’s reference
input accepts a voltage range from 0 to V
DD
. In power-
down mode the reference input is high impedance. The
MAX5741 is compatible with the 3-wire SPI, QSPI,
MICROWIRE, and DSP serial interface with Schmitt-trig-
gered logic inputs.
Reference Input and DAC Output Range
The reference input accepts positive DC and AC sig-
nals. The voltage at REF sets the full-scale output volt-
age of the four DACs. The reference input voltage
range is 0 to V
DD
. The impedance at REF is 45kΩ. The
voltage at REF can vary from GND to V
DD
. The output
voltages (V
OUT_
) are represented by a digitally pro-
grammable voltage source as:
V
OUT_
= (V
REF
✕
D) / 2
10
where D is the decimal equivalent of binary DAC input
code ranging from 0 to 1023. V
REF
is the voltage at
REF.
Output Buffer Amplifiers
All DACs are internally buffered at the output. The
buffer amplifiers have both rail-to-rail common mode
and (GND to V
REF
) output voltage range. The buffers
are unity-gain stable with C
L
= 200pF and R
L
= 5kΩ.
Buffer amplifiers are disabled during power-up and
individual DAC outputs are shorted to GND through a
100kΩ resistor. Buffer amplifiers can individually or alto-
gether be powered-down by programming the input
register control bits. During power down, contents of
the input and DAC registers remain the same. On
wake-up all DAC outputs are restored to their pre-
power down voltage values.
Power-Down Mode
In power-down mode, the DAC outputs are pro-
grammed to one of three output states, 1kΩ, 100kΩ, or
floating (Table 1). The REF input is high impedance
(2MΩ typ) to conserve current drain from the system
reference; therefore, the system reference does not
have to be powered-down. The DAC outputs return to
the values contained in the registers when brought out
of power-down. The recovery time, from total power-
down to power-up, is 8µs. This extra time is needed to
allow the internal bias to wake-up. Power-down mode
reduces current consumption to 0.3µA.
3-Wire Serial Interface
The MAX5741 digital interface is a standard 3-wire con-
nection compatible with SPI/QSPI/MICROWIRE/DSP
interfaces. The chip-select input (CS) frames the serial
data loading at DIN. Immediately following CS high-to-
low transition, the data is shifted synchronously and
latched into the input register on the falling edge of the
serial clock input (SCLK). After 16 bits have been
loaded into the serial input register, it transfers its con-
Pin Description
DAC Voltage Outputs. Power-on reset sets DAC registers to zero, and internally connects
