10
IF
Output
RFC
C4
C6
C5
C7
C1
L3
LO
Input
RF
Input
C2
L2
V
d
C3
91
L1 = 0
MLIN
A
1
C
C B A
2
1
-2
B
0.5
0.5
0.2
-0.2
0.2
2
-0.5
-1
RF
Input
C1
L
A
1
C
CBA
2
1
-2
B
0.5
0.5
0.2
-0.2
0.2
2
-0.5
-1
IF
Output
C2
L2
ries C - shunt L network (from the 50 source to Γ
RF
) will
be used to match Γ
RF
to 50 . Addition of a 6.5 nH shunt
inductance moves the impedance trajectory from Point A
to Point B. The match to 50 is completed with a 0.6 pF
series capacitance, C1, that moves the match to Point C,
the center of the Smith chart.
Application Example
The printed circuit layout in Figure 28 is a general purpose
layout that will accommodate components for using the
IAM-91563 for RF inputs from 800 MHz to 6 GHz. This lay-
out is a microstripline design (solid groundplane on the
backside of the circuit board) with 50 Ω interfaces for the
RF input, IF output, and LO input. The circuit is fabricated
on 0.031-inch thick FR-4 dielectric material. Plated through
holes (vias) are used to bring the ground to the top side of
the circuit where needed. Multiple vias are used to reduce
the inductance of the paths to ground.
Figure 28. PCB Layout.
1.9 GHz Design Example
To illustrate a design approach for using the IAM-91563, a
PCS band downconverter with an RF of 1.9 GHz and IF of
110 MHz is presented. The PCB layout above was used to
assemble the mixer and verify performance.
A schematic diagram of the 1.9 GHz circuit is shown in Fig-
ure 29.
Figure 29. Schematic of Example Application Circuit.
At the RF input port, series capacitor C1 and transmission
line MLIN form the input matching network and high pass
lter. (Note: The PCB layout above has provision for an in-
ductor, L1, in series with MLIN. Inductor L1 is not used in
this design.)
Referring to the table of Reection Coecients, the RF
input port Γ
RF
= 0.82 ∠−37° at 1.9 GHz. This point is plot-
ted as Point A on the Smith chart in Figure 30. For reasons
previously discussed in the “RF Port” section above, a se-
Figure 30. RF Input Impedance Match.
For this example, the shunt inductor was realized with the
transmission line, MLIN in Figure 29 (Z
O
= 90, length =
0.35 in.). A high quality capacitor should be selected for
C1 to minimize the eects of the capacitors parasitic in-
ductance and resistance. Series capacitor C1 also serves
to block any DC that may be present at the output of the
stage preceding the mixer.
At the IF output, the low pass lter and impedance match is
formed by shunt capacitor C2 and series inductor L2. Refer-
ring again to the table of Reection Coecients, the IF out-
put port Γ
IF
= 0.64 -8° at 100 MHz, which is the frequency
point closest to the desired IF of 110 MHz. Γ
IF
is plotted as
Point A in Figure 31.
Figure 31. IF Input Impedance Match.
RF
IF
+V
LO
IAM-91
11
RF
IF
+V
C6
C5
C4
C2
C3
MUN 1
L 1
C 1
C 7
L3
L2
RFC
LO
IAM-91
Adding a shunt capacitance (C2) of 11.3 pF brings the im-
pedance to Point B. The match to Point C at the center of
the chart is completed with a series inductance (L2) of 150
nH.
Although not necessary for many applications, the match
at the LO port can be improved by the addition of series
inductor L3 with a value of approximately 8 nH. Design in-
formation (Γ
LO
) for matching the LO port is obtained from
the table of Reection Coecients. Capacitor C7 is a DC
block for the LO port.
DC bias is applied to the IAM-91563 through the RFC at
the IF Output pin. The power supply is bypassed to ground
with capacitor C5 to keep RF, IF, and LO signals o of the
DC bias lines and to prevent gain dips or peaks in the re-
sponse of the mixer. C4 is a DC blocking capacitor for the
output.
The values of the RF bypass capacitors and DC blocking
capacitors that are not part of a impedance matching
structure (i.e., C3 - C7) should be chosen to provide a small
reactance (typically < 5 ohms) at the lowest frequency at
the port for which they are used. The reactance of the RF
choke (RFC) should be high (e.g., several hundred ohms)
at the lowest IF.
The completed 1.9 GHz mixer from the design example
above with all components and SMA connectors in place
is shown in Figure 32. Again, L1 is not used and is replaced
by a metal tab. The length of the shunt transmission line,
MLIN, is adjustable by moving the position of the short-
ing tab between the line and the ground pad. Provision is
made for an additional bypass capacitor, C6, to be added
to the bias line near the V
d
connection to eliminate un-
wanted RF feedback through bias lines.
When multiple bypass capacitors are used, consideration
should be given to potential resonances. It is important
to ensure that the capacitors, when combined with addi-
tional parasitic Ls and C’s on the circuit board, do not form
resonant circuits. The addition of a small value resistor in
the bias supply line between bypass capacitors will often
de-Q” the bias circuit and eliminate resonance eects.
Table 1 summarizes the component values for the 1.9 GHz
design.
Table 1. Component Values for 1.9 GHz Downconverter.
Component Value
C1 0.5 pF
C2 9 pF
C3, C5, C7 100 pF
C4 500 pF
L1 (not used)
L2 100 nH
L3 8.2 nH
MLIN Zo=90 Ω
l = 0.41 in.
RFC 320 nH
The values shown in Table 1 may vary from those used
above to describe the basic impedance matching ap-
proach. The nal component values take into consider-
ation additional eects such as, the various line lengths
between components, parasitics in components (e.g., the
series inductance in C1), as well as other circuit parasitics.
A CAD program such as Avago Touchstone
®
may be used
to fully analyze and account for these circuit variables.
Figure 32. Complete 1.9 GHz Mixer.
The following performance was measured for a 1.9 GHz
circuit:
Measured results:
Conversion Gain = 9.0 dB LO-RF Isolation = 17 dB
SSB Noise Figure = 8.5 dB LO-IF Isolation = 34 dB
P
1dB
(output) = -8.1 dB RF-IF Isolation = 23 dB
IP
3
(Input) = -7 dBm
Operating conditions:
RF Frequency = 1.89 GHz LO Drive Level = -5 dBm
LO Frequency = 1.78 GHz DC Power = 3.0V @ 9 mA
IF Frequency = 110 MHz
12
220 nH
100 pF
0.5 pF
100 pF
500 pF
4.7 pF
110 , 3 mm
68 nH
GC
GN
IF
RF
91
GND
LO
Vd
LO
2200
MHz
RF
2450
MHz
IF
250
MHz
3.3 nH
50
50
50
0.026
0.079
0.018
0.039
Dimensions in inches.
220 nH
100 pF
0.9 pF
220 pF
1000 pF
15 pF
10 nH
180 nH
GC
GN
IF
RF
91
GND
LO
Vd
LO
2200
MHz
RF
2450
MHz
IF
250
MHz
50
50
50
Measured results:
Conversion Gain = 7.7 dB LO-RF Isolation = 16 dB
SSB Noise Figure = 11 dB LO-IF Isolation = 35 dB
1 dB Compression = -8.7 dB RF-IF Isolation = 27 dB
IP3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 2.45 GHz LO Drive Level = -5 dBm
IF Frequency = 250 MHz DC Power = 3.0V @ 9 mA
LO Frequency = 2.2 GHz
Figure 34. 2.4 GHz ISM Band Mixer.
SOT-363 PCB Footprint
A recommended PCB pad layout for the miniature SOT-
363 (SC-70) package used by the IAM-91563 is shown in
Figure 35 (dimensions are in inches). This layout provides
ample allowance for package placement by automated
assembly equipment without adding parasitics that could
impair the high frequency RF performance of the IAM-
91563. The layout is shown with a nominal SOT-363 pack-
age footprint superimposed on the PCB pads.
Measured results:
Conversion Gain = 10.6 dB LO-RF Isolation = 21 dB
SSB Noise Figure = 7.1 dB LO-IF Isolation = 33 dB
1 dB Compression = -7.0 dB RF-IF Isolation = 17 dB
P3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 900 MHz LO Drive Level = -5 dBm
IF Frequency = 80 MHz DC Power = 3.0V @ 9 mA
LO Frequency = 980 MHz
Figure 33. 800-900 MHz Cellular and ISM Band Mixer.
Designs for Other Frequencies
The same design methodology described above can be
applied to other wireless frequency bands. Design ex-
amples and measurement results for the 900 MHz and 2.4
GHz bands are shown in Figures 33 and 34.
Figure 35. Recommended PCB Pad Layout for Avago’s SC70 6L/SOT-363
Products.

IAM-91563-BLKG

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
Up-Down Converters 3 SV 9 dB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet