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LC75809PTS-H

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P43
LC75809PT
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25
(4) OC … Internal oscillator operating mode/external clock operating mode switching control data
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC Fundamental clock operating mode I/O pin (S89/OSCI) state
0 Internal oscillator operating mode S89
1 External clock operating mode OSCI
Note : S89 : Segment output
OSCI : External clock input
(5) CT0 to CT2 … Display contrast setting control data
These control data bits set display contrast.
CT0 to CT2 : Sets the display contrast (7 steps)
CT0 CT1 CT2 LCD drive 3/3 bias voltage V
DD
0 level
0 0 0 1.00V
DD
=V
DD
-(0.05V
DD
×0)
1 0 0 0.95V
DD
=V
DD
-(0.05V
DD
×1)
0 1 0 0.90V
DD
=V
DD
-(0.05V
DD
×2)
1 1 0 0.85V
DD
=V
DD
-(0.05V
DD
×3)
0 0 1 0.80V
DD
=V
DD
-(0.05V
DD
×4)
1 0 1 0.75V
DD
=V
DD
-(0.05V
DD
×5)
0 1 1 0.70V
DD
=V
DD
-(0.05V
DD
×6)
Note : When is setting (CT0,CT1,CT2)=(1,1,1), the LCD drive 3/3 bias voltage V
DD
0 level is 1.00V
DD
.
Note that although the display contrast can be adjusted by operating the built-in display contrast
adjustment circuit, it can also be adjusted by modifying the supply pin V
DD
voltage level.
(6) P0 to P3 … Segment output port/general-purpose output port switching control data
These control data bits switch the segment output port/general-purpose output port functions of the S1/P1 to
S12/P12 output pins.
Control data Output pin state
P0 P1 P2 P3 S1/P1 S2/P2 S3/P3 S4/P4 S5/P5 S6/P6 S7/P7 S8/P8 S9/P9 S10/P10 S11/P11 S12/P12
0 0 0 0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12
0 0 0 1 P1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12
0 0 1 0 P1 P2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12
0 0 1 1 P1 P2 P3 S4 S5 S6 S7 S8 S9 S10 S11 S12
0 1 0 0 P1 P2 P3 P4 S5 S6 S7 S8 S9 S10 S11 S12
0 1 0 1 P1 P2 P3 P4 P5 S6 S7 S8 S9 S10 S11 S12
0 1 1 0 P1 P2 P3 P4 P5 P6 S7 S8 S9 S10 S11 S12
0 1 1 1 P1 P2 P3 P4 P5 P6 P7 S8 S9 S10 S11 S12
1 0 0 0 P1 P2 P3 P4 P5 P6 P7 P8 S9 S10 S11 S12
1 0 0 1 P1 P2 P3 P4 P5 P6 P7 P8 P9 S10 S11 S12
1 0 1 0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 S11 S12
1 0 1 1 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 S12
1 1 0 0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12
Note1 : Sn(n=1 to 12) : Segment output ports
Pn(n=1 to 12) : General-purpose output ports
Note2 : When are setting (P0,P1,P2,P3)=(1,1,0,1), (1,1,1,0), and (1,1,1,1), the all P1/S1 to P12/S12 output
pins selects the segment output port.
LC75809PT
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26
The table below lists the correspondence between the display data and the output pins when these pins are selected to be
general-purpose output ports (general-purpose output function).
Output pin
Correspondence display data
1/4 duty 1/3 duty
S1/P1 D1 D1
S2/P2 D5 D4
S3/P3 D9 D7
S4/P4 D13 D10
S5/P5 D17 D13
S6/P6 D21 D16
S7/P7 D25 D19
S8/P8 D29 D22
S9/P9 D33 D25
S10/P10 D37 D28
S11/P11 D41 D31
S12/P12 D45 D34
For example, if the circuit is operated in 1/4 duty and the S4/P4 output pin is selected to be a general-purpose output
port and is set general-purpose output function, the S4/P4 output pin will output a high (V
DD
) level when the
display data D13 is 1, and will output a low (V
SS
) level when D13 is 0.
(7) DT … 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive switching control data
This control data bit selects either 1/4-duty 1/3-bias drive or 1/3-duty 1/3-bias drive.
DT Drive scheme The COM4/S87 pin state
0 1/4-duty 1/3-bias drive COM4
1 1/3-duty 1/3-bias drive S87
Note : COM4 : Common output
S87 : Segment output
(8) DN … S88 pin and S89/OSCI pin state setting control data
This control data bit sets state of the S88 pin and the S89/OSCI pin.
DN
Number of display segments Pin state
1/4 duty 1/3 duty S88 S89/OSCI
0 Up to 344 segments Up to 261 segments “L”(V
SS
) “L”(V
SS
)/OSCI
1 Up to 352 segments Up to 267 segments S88 S89/OSCI
Note : "L" (V
SS
) : Low (V
SS
) level output
S88 : Segment output
"L" (V
SS
)/OSCI : Low (V
SS
) level output in internal oscillator operating mode (OC=0)
External clock input in external clock operating mode (OC=1)
S89/OSCI : Segment output in internal oscillator operating mode (OC=0)
External clock input in external clock operating mode (OC=1)
(9) EXF … External clock operating frequency setting control data
This control data bit sets the operating frequency of the external clock which input into the OSCI pin, when the
external clock operating mode (OC="1") is set. However, be careful of setting the f
CK
1=300[kHz]typ when the
external clock operating mode (OC="1") is set in the case of the simple mode transfer forcibly. In addition, this data
is effective only when external clock operating mode (OC= "1") is set.
EXF External clock operating frequency f
CK
[kHz]
0
f
CK
1=300[kHz] typ
1
f
CK
2=38[kHz] typ
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(10) SC … Segment on/off control data
This control data bit controls the on/off state of the segments.
SC Display state
0 On
1 Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
(11) BU … Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU Mode
0
Normal mode
1
Power saving mode
In this mode, the internal oscillator circuit stops oscillation (the S89/OSCI pin is configured for segment output) if the IC is
in the internal oscillator operating mode (OC=0) and the IC stops receiving external clock signals (the S89/OSCI pin is
configured for external clock input) if the IC is in the external clock operating mode (OC=1).
The common and segment output pins go to the V
SS
level. However, the S1/P1 to S12/P12 output pins can be used as
general-purpose output ports under the control of the data bits P0 to P3.
(The general-purpose output port P1 to P12 can not be used as PWM output or clock output).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P43

LC75809PTS-H

Mfr. #:
Buy LC75809PTS-H
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
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