LTC3602
6
3602fb
BLOCK DIAGRAM
PIN FUNCTIONS
SYNC/MODE (Pin 1/Pin 4): Mode Select and External
Clock Synchronization Input.
PGOOD (Pin 2/Pin 5): Power Good Output. Open-drain
logic output that is pulled to ground when the output volt-
age is not within ±10% of regulation point.
R
T
(Pin 3/Pin 6): Frequency Set Pin.
I
TH
(Pin 4/Pin 7): Error Amplifi er Compensation Point.
V
FB
(Pin 5/Pin 8): Feedback Pin.
SGND (Pin 17/Pin 9, Pin 21): Signal Ground.
RUN (Pin 6/Pin 10): Run Control Input. This pin may be
tied to PV
IN
to enable the chip.
TRACK/SS (Pin 7/Pin 11): Tracking Input for the Controller
or Optional External Soft-Start Input. This pin allows the
start-up of V
OUT
to “track” the external voltage at this pin
using an external resistor divider. An external soft-start can
be programmed by connecting a capacitor between this
pin and ground. Leave this pin fl oating to use the internal
1ms soft-start clamp. Do not tie this pin to INTV
CC
or to
PV
IN
.
PGND (Pins 8, 9, 10/Pins 12, 13, 14, 15): Power
Ground.
SW (Pins 11, 12, 13/Pins 16, 17, 18, 19): Switch Node
Connection to the Inductor.
BOOST (Pin 14/Pin 20): Bootstrapped Supply to the Top
Side Floating Gate Driver.
PV
IN
(Pin 15/Pins 1,2): Power Input Supply. Decouple
this pin with a capacitor to PGND
INTV
CC
(Pin 16/Pin 3): Output of Internal 5V LDO.
Exposed Pad (Pin 17/Pin 21): SGND. Exposed pad is
signal ground and must be soldered to the PCB.
RUNR
T
SYNC/MODE
BOOSTI
TH
INTV
CC
PV
IN
3602 BD
LDO
SW
SW
PGND
PGND
PGOOD
V
FB
TRACK/SS
LOGIC
SLOPE
COMPENSATION
RECOVERY
VOLTAGE
REFERENCE
1ms
SOFT-START
OSILLATOR
SLOPE
COMPENSATION
PGND
SW
–
+
+
+
–
+
–
+
–
+
–
+
–
+
–
+
+
–
1μA
0.6V
0.54V
0.66V
ERROR
AMPLIFIER
BURST
COMPARATOR
OVER-CURRENT
COMPARATOR
REVERSE
COMPARATOR
MAIN
I-COMPARATOR
BCLAMP
SYNC/MODE
FE/UF Package
