4.1. Pin Assignment
Pin Signal Function Alternative Function
1 ADC4 Analogue to Digital input
2 DAC1 Digital to Analogue output
3 DAC2 Digital to Analogue output
4 COMP2+
5 COMP2-
Comparator 2 inputs
6 SPICLK SPI master clock out
7 SPIMISO SPI Master In/Slave Out
8 SPIMOSI SPI Master Out/Slave In
9 SPISSZ SPI select from module - SS0 (output)
10 SPISEL1 SPI Slave Select1 (output) General Purpose Digital I/O DIO0
11 SPISEL2 SPI Slave Select2 (output) General Purpose Digital I/O DIO1
12 SPISEL3* SPI Slave Select3 (output) General Purpose Digital I/O DIO2 *
13 SPISSM SPI select to FLASH (input)
14 SPISWP FLASH write protect (input)
15 SPISEL4* SPI Slave Select4 (output) General Purpose Digital I/O DIO3*
16 CTS0 UART0 Clear To Send (input) General Purpose Digital I/O DIO4
17 RTS0 UART0 Request To Send (output) General Purpose Digital I/O DIO5
18 TXD0 UART0 Transmit Data (output) General Purpose Digital I/O DIO6
19 RXD0 UART0 Receive Data (input) General Purpose Digital I/O DIO7
20 TIM0GT Timer0 clock/gate (input) General Purpose Digital I/O DIO8
21 TIM0_CAP Timer0 capture (input) General Purpose Digital I/O DIO9
22 TIM0_OUT Timer0 PWM (output) General Purpose Digital I/O DIO10
23 TIM1GT Timer1 clock/gate (input) General Purpose Digital I/O DIO11
24 VDD 3V power
25 GND Digital ground
26 VSSA Analogue ground
27 TIM1_CAP Timer1 capture (input) General Purpose Digital I/O DIO12
28 TIM1_OUT Timer1 PWM (output) General Purpose Digital I/O DIO13
29 RESETN Active low reset
30 SIF_CLK Serial Interface clock / Intelligent peripheral clock General Purpose Digital I/O DIO14
© NXP Laboratories UK 2010 JN-DS-JN5139-xxx-Myy 1v6 7
Pin Signal Function Alternative Function
Serial Interface data / Intelligent peripheral data
out (output)
General Purpose Digital I/O DIO15
31 SIF_D
32 DIO 16 Intelligent peripheral device data in (input) General Purpose Digital I/O
UART1 Clear To Send (input) / Intelligent
peripheral device select (input)
General Purpose Digital I/O DIO17
33 CTS1
34a RTS1 UART1 Request To Send (output) / Intelligent
peripheral interrupt (output)
General Purpose Digital I/O DIO18
35 TXD1 UART1 Transmit Data (output) General Purpose Digital I/O DIO19
36 RXD1 UART1 Receive Data (input) General Purpose Digital I/O DIO20
37 COMP1-
38 COMP1+
Comparator 1 inputs
39 ADC1 Analogue to Digital input
40 ADC2 Analogue to Digital input
41 ADC3 Analogue to Digital input
*: These two pins are not connected for High power modules
4.2. Pin Descriptions
All pins behave as described in the JN-DS- JN5139 Wireless Microcontroller Datasheet [2], with the exception of the
following:
4.2.1 Power Supplies
A single power supply pin, VDD is provided. Separate analogue (VSSA) and digital (GND) grounds are provided.
These should be connected together at the module pins.
4.2.2 SPI Memory Connections
SPISWP is a write protect pin for the serial flash memory. This should be held low to inhibit writes to the flash device.
SPISSZ is connected to SPI Slave Select 0 on the JN5139.
SPISSM is connected to the Slave Select pin on the memory.
This configuration allows the flash memory device to be programmed using an external SPI programmer if required.
For programming in this mode, the JN5139 should be held in reset by taking RESETN low.
The memory can also be programmed over the UART by using the flash programmer software provided by Jennic.
This is available as part of the Software Developer kit and libraries available from
www.nxp.com/jennic. To enter
this programming mode, SPIMISO (pin 7) should be held low whilst the chip is reset. Once programming has finished,
the chip should be reset, when it will execute the new code downloaded.
For normal operation of the module and programming over the UART, SPISSZ should be connected to
SPISSM.
8 JN-DS-JN5139-xxx-Myy 1v6 © NXP Laboratories UK 2010
5. Electrical Characteristics
In most cases, the Electrical Characteristics are the same for both module and chip. They are described in detail in
the chip datasheet. Where there are differences, they are detailed below.
5.1. Maximum Ratings
Exceeding these conditions will result in damage to the device.
Parameter Min Max
Device supply voltage VDD -0.3V 3.6V
Voltage on analogue pins: ADC1-4, DAC1-2, COMP1-,
COMP1+, COMP2-, COMP2+, DIO9, DIO10, SPISSM,
SPISWP, SPICLK, SPIMOSI, SPIMISO,
-0.3V VDD + 0.3V
Voltage on 5v tolerant digital pins: SPISSZ, DIO0-
DIO8, DIO11-DIO20, RESETN
-0.3V Lower of (VDD + 2V)
and 5.5V
Storage temperature -40ºC 150ºC
Reflow soldering temperature according to IPC/JEDEC
J-STD-020C
260ºC
This device is sensitive to ESD and should only be handled using ESD precautions.
5.2. Reflow Profile
For reflow soldering, it is recommended to follow the reflow profile in Figure 2 as a guide, as well as the paste
manufacturers guidelines on peak flow temperature, soak times, time above liquidus and ramp rates.
Temperature 25~160 ºC 160~190 ºC > 220º C 230~Pk. Pk. Temp
(235ºC)
Target Time (s) 90~130 30~60 20~50 10~15 160~270
Figure 2: Recommended solder reflow profile
© NXP Laboratories UK 2010 JN-DS-JN5139-xxx-Myy 1v6 9

JN5139-001-M/01R1V

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Zigbee Modules (802.15.4) WIRELESS MCU IEEE802.15.4 TRNSCVR
Lifecycle:
New from this manufacturer.
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