DS2751
10 of 19
TEMPERATURE MEASUREMENT
The DS2751 uses an integrated temperature sensor to continually measure battery temperature.
Temperature measurements are updated in the Temperature Register every 220ms in two’s-complement
format with a resolution of 0.125°C over a ±127°C range. The Temperature Register format is shown in
Figure 7.
Figure 7. TEMPERATURE REGISTER FORMAT
MSB—Address 18 LSB—Address 19
S 2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
X X X X X
MSb LSb MSb LSb
Units: 0.125°C
PROGRAMMABLE I/O
To use the PIO pin as an output, write the desired output value to the PIO bit in the Special Feature
Register. Writing a 0 to the PIO bit enables the PIO output driver, pulling the PIO pin to V
SS
. Writing a 1
to the PIO bit disables the output driver, allowing the PIO pin to be pulled high or used as an input. To
sense the value on the PIO pin, read the PIO bit. The DS2751 turns off the PIO output driver and sets the
PIO bit high when in sleep mode or when DQ is low for more than t
SLEEP
(2.2s), regardless of the state of
the PMOD bit.
MEMORY
The DS2751 has a 256-byte linear address space with registers for instrumentation, status, and control in
the lower 32 bytes, with lockable EEPROM and SRAM memory occupying portions of the remaining
address space. All EEPROM and SRAM memory is general-purpose except addresses 31h and 33h,
which should be written with the default values for the Status Register and Current Offset Register,
respectively. When the MSB of any two-byte register is read, both the MSB and LSB are latched and held
for the duration of the Read Data command to prevent updates during the read and to ensure
synchronization between the two register bytes. For consistent results, always read the MSB and the LSB
of a two-byte register during the same Read Data command sequence.
EEPROM memory is shadowed by RAM to eliminate programming delays between writes and to allow
the data to be verified by the host system before being copied to EEPROM. All reads and writes to/from
EEPROM memory actually access the shadow RAM. In unlocked EEPROM blocks, the Write Data
command updates shadow RAM. In locked EEPROM blocks, the Write Data command is ignored. The
Copy Data command copies the contents of shadow RAM to EEPROM in an unlocked block of
EEPROM but has no effect on locked blocks. The Recall Data command copies the contents of a block of
EEPROM to shadow RAM regardless of whether the block is locked or not.
DS2751
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Table 3. MEMORY MAP
ADDRESS (HEX) DESCRIPTION READ/WRITE
00 Reserved
01 Status Register R
02 to 06 Reserved
07 EEPROM Register R/W
08 Special Feature Register R/W
09 to 0B Reserved
0C Voltage Register MSB R
0D Voltage Register LSB R
0E Current Register MSB R
0F Current Register LSB R
10 Accumulated Current Register MSB R/W
11 Accumulated Current Register LSB R/W
12 to 17 Reserved
18 Temperature Register MSB R
19 Temperature Register LSB R
1A to 1F Reserved
20 to 2F EEPROM, block 0 R/W*
30 to 3F EEPROM, block 1 R/W*
40 to 7F Reserved
80 to 8F SRAM R/W
90 to FF Reserved
*Each EEPROM block is read/write until locked by the LOCK command, after which it is read-only.
STATUS REGISTER
The default values for the Status Register bits are stored in lockable EEPROM in the corresponding bits
of address 31h. A Recall Data command for EEPROM block 1 recalls the default values into the Status
Register bits. The format of the Status Register is shown in Figure 8. The function of each bit is described
in detail in the following paragraphs.
Figure 8. STATUS REGISTER FORMAT
Address 01
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
X X PMOD RNAOP UVEN X X X
PMOD—Sleep Mode Enable. A value of 1 in this bit enables the DS2751 to enter sleep mode when the
DQ line goes low for greater than t
SLEEP
. A value of 0 disables the DS2751 from entering the sleep mode.
This bit is read-only. The desired default value should be set in bit 5 of address 31h. The factory default
is 0.
RNAOP—Read Net Address Opcode. A value of 0 in this bit sets the opcode for the Read Net Address
command to 33h, while a 1 sets the opcode to 39h. This bit is read-only. The desired default value should
be set in bit 4 of address 31h. The factory default is 0.
DS2751
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UVEN—Undervoltage Sleep Enable. A value of 1 in UVEN along with a value of 1 in PMOD enables
the DS2751 to enter sleep mode when the voltage on V
IN
drops below undervoltage threshold V
UV
for
t
UVD
(cell depletion). A value of 0 disables the DS2751 from entering the sleep mode due to undervoltage
events. This bit is read-only. The desired default value should be set in bit 3 of address 31h. The factory
default is 0.
X—Reserved Bits.
EEPROM REGISTER
The format of the EEPROM Register is shown in Figure 9. The function of each bit is described in detail
in the following paragraphs.
Figure 9. EEPROM REGISTER FORMAT
Address 07
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
EEC LOCK X X X X BL1 BL0
EEC—EEPROM Copy Flag. A 1 in this read-only bit indicates that a Copy Data command is in progress.
While this bit is high, writes to EEPROM addresses are ignored. A 0 in this bit indicates that data can be
written to unlocked EEPROM blocks.
LOCK—EEPROM Lock Enable. When this bit is 0, the Lock command is ignored. Writing a 1 to this bit
enables the Lock command. After the Lock command is executed, the LOCK bit is reset to 0. The factory
default is 0.
BL1—EEPROM Block 1 Lock Flag. A 1 in this read-only bit indicates that EEPROM block 1 (addresses
30 to 3F) is locked (read-only), while a 0 indicates block 1 is unlocked (read/write).
BL0—EEPROM Block 0 Lock Flag. A 1 in this read-only bit indicates that EEPROM block 0 (addresses
20 to 2F) is locked (read-only), while a 0 indicates block 0 is unlocked (read/write).
X—Reserved Bits.
SPECIAL FEATURE REGISTER
The format of the Special Feature Register is shown in Figure 10. The function of each bit is described in
detail in the following paragraphs.
Figure 10. SPECIAL FEATURE REGISTER FORMAT
Address 08
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
POR
PIO X X X X X X

DS2751E+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Battery Management
Lifecycle:
New from this manufacturer.
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