AS7C1026B-12JCNTR

®
AS7C1026B
3/26/04, v 1.3 Alliance Semiconductor P. 4 of 10
Key to switching waveforms
Read waveform 1 (address controlled)
3,6,7,9
Read cycle (over the operating range)
3,9
Parameter Symbol
-10
-12 -15 -20
Unit NotesMin Max Min Max Min Max Min Max
Read cycle time t
RC
10–12–15–20-ns
Address access time t
AA
–10–12–15-20ns 3
Chip enable (CE
) access time t
ACE
–10–12–15-20ns 3
Output enable (OE
) access time t
OE
–5–6–7-8ns
Output hold from address change t
OH
3–3–3–3-ns 5
CE
low to output in low Z t
CLZ
3–3–3–3-ns4, 5
CE
high to output in high Z t
CHZ
–4–5–6-7ns4, 5
OE
low to output in low Z t
OLZ
0–0–0–0-ns4, 5
Byte select access time t
BA
–5–6–7-8ns
Byte select Low to low Z t
BLZ
0–0–0–0-ns4, 5
Byte select High to high Z t
BHZ
–5–6–6-7ns4, 5
OE
high to output in high Z t
OHZ
–4–5–6-7ns4, 5
Power up time t
PU
0–0–0–0-ns4, 5
Power down time t
PD
–10–12–15-20ns4, 5
Undefined output/don’t careFalling inputRising input
t
OH
t
AA
t
RC
t
OH
Data
OUT
Address
Data validPrevious data valid
®
AS7C1026B
3/26/04, v 1.3 Alliance Semiconductor P. 5 of 10
Read waveform 2 (OE, CE, UB, LB controlled)
3,6,8,9
Write cycle (over the operating range)
11
Parameter Symbol
-10 -12 -15 -20
Unit NotesMin Max Min Max Min Max Min Max
Write cycle time t
WC
10 12 15 20 - ns
Chip enable (CE
) to write end t
CW
8–91012- ns
Address setup to write end t
AW
8–91012- ns
Address setup time t
AS
0–00–0- ns
Write pulse width t
WP
78–912- ns
Write recovery time t
WR
0–00–0- ns
Address hold from end of write t
AH
0–00–0- ns
Data valid to write end t
DW
56–810- ns
Data hold time t
DH
0–00–0- ns 5
Write enable to output in high Z t
WZ
5–6–7 - 8 ns 4, 5
Output active from write end t
OW
1–11–2- ns 4, 5
Byte select low to end of write t
BW
7–89–9- ns
Data valid
t
RC
t
AA
t
BLZ
t
BA
t
OE
t
OLZ
t
OH
t
OHZ
t
HZ
t
BHZ
t
ACE
t
LZ
Address
OE
CE
LB, UB
Data
IN
AS7C1026B
®
3/26/04, v 1.3 Alliance Semiconductor P. 6 of 10
Write waveform 1 (WE controlled)
11
Write waveform 2 (CE controlled)
11
Address
CE
LB, UB
WE
Data
IN
Data
OUT
t
WC
t
CW
t
BW
t
AW
t
AS
t
WP
t
DW
t
DH
t
OW
t
WZ
t
WR
Data undefined
high Z
Data valid
t
AH
Address
CE
LB, UB
WE
Data
IN
t
WC
t
CW
t
BW
t
WP
t
DW
t
DH
t
OW
t
WZ
t
WR
Data
OUT
Data undefined
high Z high Z
t
AS
t
AW
Data valid
t
CLZ
t
AH

AS7C1026B-12JCNTR

Mfr. #:
Manufacturer:
Alliance Memory
Description:
SRAM 1M, 5V, 12ns FAST 64K x 16 Asynch SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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