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AD624SD/883B

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
REV. C –3–
AD624
Model AD624A AD624B AD624C AD624S
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Units
REFERENCE INPUT
R
IN
16 20 24 16 20 24 16 20 24 16 20 24 kΩ
I
IN
30 30 30 30 µA
Voltage Range ±10 ±10 ±10 ±10 V
Gain to Output 1 1 1 1 %
TEMPERATURE RANGE
Specified Performance –25 +85 –25 +85 –25 +85 –55 +125 °C
Storage –65 +150 –65 +150 –65 +150 –65 +150 °C
POWER SUPPLY
Power Supply Range
ⴞ
6
ⴞ
15
ⴞ
18
ⴞ
6
ⴞ
15
ⴞ
18
ⴞ
6
ⴞ
15
ⴞ
18
ⴞ
6
ⴞ
15
ⴞ
18 V
Quiescent Current 3.5 5 3.5 5 3.5 5 3.5 5 mA
NOTES
1
V
DL
is the maximum differential input voltage at G = 1 for specified nonlinearity, V
DL
at other gains = 10 V/G. V
D
= actual differential input voltage.
1
Example: G = 10, V
D
= 0.50. V
CM
= 12 V – (10/2 × 0.50 V) = 9.5 V.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production unit at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . 420 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD624A/B/C . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
AD624S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature (Soldering, 60 secs) . . . . . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CONNECTION DIAGRAM
–INPUT
+INPUT
RG
1
OUTPUT NULL
INPUT NULL
REF
–V
S
G = 200
G = 500
SENSE
RG
2
INPUT NULL
OUTPUT NULL
G = 100
+V
S
OUTPUT
1
2
5
6
7
3
4
8
16
15
12
11
10
14
13
9
TOP VIEW
(Not to Scale)
AD624
SHORT TO
RG
2
FOR
DESIRED
GAIN
FOR GAINS OF 1000 SHORT RG
1
TO PIN 12
AND PINS 11 AND 13 TO RG
2
METALIZATION PHOTOGRAPH
Contact factory for latest dimensions
Dimensions shown in inches and (mm).
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD624AD –25°C to +85°C 16-Lead Ceramic DIP D-16
AD624BD –25°C to +85°C 16-Lead Ceramic DIP D-16
AD624CD –25°C to +85°C 16-Lead Ceramic DIP D-16
AD624SD –55°C to +125°C 16-Lead Ceramic DIP D-16
AD624SD/883B* –55°C to +125°C 16-Lead Ceramic DIP D-16
AD624AChips –25°C to +85°CDie
AD624SChips –25°C to +85°CDie
*See Analog Devices’ military data sheet for 883B specifications.
REV. C
AD624–Typical Characteristics
20
0
0
20
15
5
5
10
15
10
SUPPLY VOLTAGE – ⴞV
INPUT VOLTAGE RANGE – ⴞV
+25ⴗC
Figure 1. Input Voltage Range vs.
Supply Voltage, G = 1
8.0
0
0
20
6.0
2.0
5
4.0
1510
SUPPLY VOLTAGE – ⴞV
AMPLIFIER QUIESCENT CURRENT – mA
Figure 4. Quiescent Current vs.
Supply Voltage
16
0
20
4
2
50
8
6
10
12
14
15
10
INPUT VOLTAGE – ⴞV
INPUT BIAS CURRENT – ⴞnA
Figure 7. Input Bias Current vs. CMV
20
0
0
20
15
5
5
10
15
10
SUPPLY VOLTAGE – ⴞV
OUTPUT VOLTAGE SWING – ⴞV
Figure 2. Output Voltage Swing vs.
Supply Voltage
16
0
20
4
2
50
8
6
10
12
14
15
10
SUPPLY VOLTAGE – ⴞV
INPUT BIAS CURRENT – ⴞnA
Figure 5. Input Bias Current vs.
Supply Voltage
–1
7
8.0
5
6
1.00
3
4
2
1
0
7.06.05.04.03.02.0
WARM-UP TIME – Minutes
⌬VOS FROM FINAL VALUE – ␮V
Figure 8. Offset Voltage, RTI, Turn
On Drift
10
100 10k1k
30
20
0
10
LOAD RESISTANCE – ⍀
OUTPUT VOLTAGE SWING – V p-p
Figure 3. Output Voltage Swing vs.
Load Resistance
40
–40
125
–20
–30
–75
0
–10
10
20
30
7525–25
TEMPERATURE – ⴗC
INPUT BIAS CURRENT – nA
–125
Figure 6. Input Bias Current vs.
Temperature
0
500
100
10
1
1
10 10M1M100k10k1k100
FREQUENCY – Hz
GAIN – V/V
Figure 9. Gain vs. Frequency
–4–
REV. C
AD624
–5–
0
1
10 10M1M100k10k1k100
FREQUENCY – Hz
–100
–80
–60
–40
CMRR – dB
–120
–140
–20
G = 500
G = 1
G = 100
Figure 10. CMRR vs. Frequency RTI,
Zero to 1k Source Imbalance
160
0
100k
40
20
10
80
60
100
120
140
10k1k100
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
G = 500
G = 100
G = 1
–V
S
= –15V dc+
1V p-p SINEWAVE
Figure 13. Negative PSRR vs.
Frequency
Figure 16. Low Frequency Voltage
Noise
,
G = 1 (System Gain = 1000)
30
20
0
10
FULL-POWER RESPONSE – V p-p
FREQUENCY – Hz
10k1k 100k 1M
G = 1, 100
G = 500
G = 100
G = 1000
BANDWIDTH LIMITED
-
Figure 11. Large Signal Frequency
Response
VOLT NSD – nV/ Hz
0.1
100
1
10
1000
100k101 10k1k100
FREQUENCY – Hz
G = 1
G = 10
G = 100, 1000
G = 1000
Figure 14. RTI Noise Spectral
Density vs. Gain
Figure 17. Low Frequency Voltage
Noise, G = 1000 (System Gain =
100,000)
160
0
100k
40
20
10
80
60
100
120
140
10k1k100
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
G = 500
G = 100
G = 1
–V
S
= –15V dc+
1V p-p SINEWAVE
Figure 12. Positive PSRR vs.
Frequency
10
10k
100
1000
100k
100k10.1 10k10010
FREQUENCY – Hz
CURRENT NOISE SPECTRAL DENSITY – fA/ Hz
Figure 15. Input Current Noise
20
8 TO –8
12 TO –12
0
OUTPUT
STEP –V
4 TO –4
–4 TO 4
–8 TO 8
–12 TO 12
15105
SETTLING TIME – ␮s
1%
1%
0.1% 0.01%
0.1% 0.01%
Figure 18. Settling Time, Gain = 1
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

AD624SD/883B

Mfr. #:
Buy AD624SD/883B
Manufacturer:
Analog Devices Inc.
Description:
Instrumentation Amplifiers LOW NOISE HI PREC
Lifecycle:
New from this manufacturer.
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