10
FN3086.6
July 21, 2005
System Timing
Figure 7 shows the clocking arrangement used in the
ICL7136. Two basic clocking arrangements can be used:
1. Figure 9A, an external oscillator connected to DIP pin 40.
2. Figure 9B, an R-C oscillator using all three pins.
The oscillator frequency is divided by four before it clocks
the decade counters. It is then further divided to form the
three convert-cycle phases. These are signal integrate
(1000 counts), reference de-integrate (0 to 2000 counts) and
auto-zero (1000 to 3000 counts). For signals less than full
scale, auto-zero gets the unused portion of reference de-
integrate. This makes a complete measure cycle of 4,000
counts (16,000 clock pulses) independent of input voltage.
For three readings/second, an oscillator frequency of 48kHz
would be used.
To achieve maximum rejection of 60Hz pickup, the signal
integrate cycle should be a multiple of 60Hz. Oscillator
frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz,
40kHz, 33
1
/
3
kHz, etc., should be selected. For 50Hz
rejection, Oscillator frequencies of 200kHz, 100kHz,
66
2
/
3
kHz, 50kHz, 40kHz, etc. would be suitable. Note that
40kHz (2.5 readings/sec.) will reject both 50Hz and 60Hz
(also 400Hz and 440Hz).
Component Value Selection
Integrating Resistor
Both the buffer amplifier and the integrator have a class A
output stage with 100µA of quiescent current. They can
supply 1µA of drive current with negligible nonlinearity. The
integrating resistor should be large enough to remain in this
very linear region over the input voltage range, but small
enough that undue leakage requirements are not placed on
the PC board. For 2V full scale, 1.8M is near optimum and
similarly a 180k for a 200mV scale.
Integrating Capacitor
The integrating capacitor should be selected to give the
maximum voltage swing that ensures tolerance buildup will
not saturate the integrator swing (approximately 0.3V from
either supply). In the ICL7136, when the analog COMMON
is used as a reference, a nominal +2V full-scale integrator
swing is fine. For three readings/second (48kHz clock)
nominal values for C
lNT
are 0.047µF and 0.5µF,
respectively. Of course, if different oscillator frequencies are
used, these values should be changed in inverse proportion
to maintain the same output swing.
An additional requirement of the integrating capacitor is that
it must have a low dielectric absorption to prevent roll-over
errors. While other types of capacitors are adequate for this
application, polypropylene capacitors give undetectable
errors at reasonable cost.
Auto-Zero Capacitor
The size of the auto-zero capacitor has some influence on
the noise of the system. For 200mV full scale where noise is
very important, a 0.47µF capacitor is recommended. On the
2V scale, a 0.047µF capacitor increases the speed of
recovery from overload and is adequate for noise on this
scale.
Reference Capacitor
A 0.1µF capacitor gives good results in most applications.
However, where a large common mode voltage exists (i.e.,
the REF LO pin is not at analog COMMON) and a 200mV
scale is used, a larger value is required to prevent roll-over
error. Generally 1µF will hold the roll-over error to 0.5 count
in this instance.
Oscillator Components
For all ranges of frequency a 180k resistor is
recommended and the capacitor is selected from the
equation:
CLOCK
INTERNAL TO PART
40 39
38
³4
TEST
CLOCK
INTERNAL TO PART
40 39
38
³4
R
C
FIGURE 7B. RC OSCILLATOR
FIGURE 7. CLOCK CIRCUITS
FIGURE 7A. EXTERNAL OSCILLATOR
f
0.45
RC
-------------
For 48kHz Clock (3 Readings/s.),=
C50pF.=
ICL7136
11
FN3086.6
July 21, 2005
Reference Voltage
The analog input required to generate full scale output (2000
counts) is: V
lN
= 2V
REF
. Thus, for the 200mV and 2V scale,
V
REF
should equal 100mV and 1V, respectively. However, in
many applications where the A/D is connected to a
transducer, there will exist a scale factor other than unity
between the input voltage and the digital reading. For
instance, in a weighing system, the designer might like to
have a full scale reading when the voltage from the
transducer is 0.662V. Instead of dividing the input down to
200mV, the designer should use the input voltage directly
and select V
REF
= 0.341V. Suitable values for integrating
resistor and capacitor would be 330k and 0.047µF. This
makes the system slightly quieter and also avoids a divider
network on the input. Another advantage of this system
occurs when a digital reading of zero is desired for V
IN
0.
Temperature and weighing systems with a variable fare are
examples. This offset reading can be conveniently
generated by connecting the voltage transducer between
IN HI and COMMON and the variable (or fixed) offset
voltage between COMMON and IN LO.
Typical Applications
The ICL7136 may be used in a wide variety of
configurations. The circuits which follow show some of the
possibilities, and serve to illustrate the exceptional versatility
of these A/D converters.
The following application notes contain very useful
information on understanding and applying this part and are
available from Intersil.
Application Notes
NOTE # DESCRIPTION
AN016 “Selecting A/D Converters”
AN017 “The Integrating A/D Converter”
AN018 “Do’s and Don’ts of Applying A/D Converters”
AN023 “Low Cost Digital Panel Meter Designs”
AN032 “Understanding the Auto-Zero and Common Mode
Performance of the ICL7136/7/9 Family”
AN046 “Building a Battery-Operated Auto Ranging DVM with
the ICL7106”
AN052 “Tips for Using Single Chip 3
1
/
2
Digit A/D Converters”
FIGURE 8. ICL7136 USING THE INTERNAL REFERENCE FIGURE 9. RECOMMENDED COMPONENT VALUES FOR 2V
FULL SCALE
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
OSC 1
OSC 2
OSC 3
TEST
REF HI
REF LO
C
REF
C
REF
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V -
G2
C3
A3
G3
BP
50pF
TO PIN 1
SET V
REF
= 100mV
0.1µF
0.01µF
1M
180k
20k 240k
IN
+
-
9V
180k
0.047µF
0.47µF
TO BACKPLANE
TO DISPLAY
Values shown are for 200mV full scale, 3 readings/sec., floating
supply voltage (9V battery).
+
-
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
OSC 1
OSC 2
OSC 3
TEST
REF HI
REF LO
C
REF
C
REF
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V -
G2
C3
A3
G3
BP/GND
50pF
TO PIN 1
SET V
REF
= 100mV
0.1µF
0.01µF
1M
180k
250k 240k
IN
+
-
1.8M
0.047µF
0.01µF
TO DISPLAY
V+
V-
ICL7136
12
FN3086.6
July 21, 2005
FIGURE 10. ICL7136 USED AS A DIGITAL CENTIGRADE
THERMOMETER
FIGURE 11. CIRCUIT FOR DEVELOPING UNDERRANGE AND
OVERRANGE SIGNAL FROM ICL7136 OUTPUTS
FIGURE 12. AC TO DC CONVERTER WITH ICL7136
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
OSC 1
OSC 2
OSC 3
TEST
REF HI
REF LO
C
REF
C
REF
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V -
G2
C3
A3
G3
BP
50pF
TO PIN 1
0.1µF
0.01µF
100k 1M
9V
390k
0.47µF
TO BACKPLANE
TO DISPLAY
A silicon diode-connected transistor has a temperature coefficient
of about -2mV/
o
C. Calibration is achieved by placing the sensing
transistor in ice water and adjusting the zeroing potentiometer for a
000.0 reading. The sensor should then be placed in boiling water
and the scale-factor potentiometer adjusted for a 100.0 reading.
Value depends on clock frequency.
SCALE
FACTOR
ADJUST
200k 470k
22k
SILICON NPN
MPS 3704 OR
SIMILAR
ZERO
ADJUST
+
-
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
V+
D1
C1
B1
A1
F1
G1
E1
D2
C2
B2
A2
F2
E2
D3
B3
F3
E3
AB4
POL
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
OSC 1
OSC 2
OSC 3
TEST
REF HI
REF LO
C
REF
C
REF
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V-
G2
C3
A3
G3
BP
O /RANGE
U /RANGE
CD4023 OR
74C10
CD4077
TO LOGIC
V
CC
V+
TO
LOGIC
V-
GND
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
OSC 1
OSC 2
OSC 3
TEST
REF HI
REF LO
C
REF
C
REF
COMMON
IN HI
IN LO
A-Z
BUFF
INT
V
-
G2
C3
A3
G3
BP
50pF
TO PIN 1
0.1µF
180k
20k 220k
180k
0.047µF
0.47µF
TO BACKPLANE
TO DISPLAY
Test is used as a common-mode reference level to ensure compatibility with most op amps.
10µF
9V
10µF
470k
1µF
4.3k
100pF
(FOR OPTIMUM
BANDWIDTH)
1µF
10k
10k
1N914
1µF
0.22µF
5µF
CA3140
2.2M
+
-
100k
AC IN
SCALE FACTOR ADJUST
(V
REF
= 100mV FOR AC TO RMS)
+
-
ICL7136

ICL7136CPLZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
LCD Drivers ADC 3 5 DIG LW PWR 7106 COM
Lifecycle:
New from this manufacturer.
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