7
FN3086.6
July 21, 2005
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO
for a fixed time. This differential voltage can be within a wide
common mode range: up to 1V from either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog
COMMON to establish the correct common mode voltage. At
the end of this phase, the polarity of the integrated signal is
determined.
De-Integrate Phase
The final phase is de-integrate, or reference integrate. Input
low is internally connected to analog COMMON and input
high is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the capacitor
will be connected with the correct polarity to cause the
integrator output to return to zero. The time required for the
output to return to zero is proportional to the input signal.
Specifically the digital reading displayed is:
.
Zero Integrator Phase
The final phase is zero integrator. First, input low is shorted to
analog COMMON. Second, the reference capacitor is charged
to the reference voltage. Finally, a feedback loop is closed
around the system to IN HI to cause the integrator output to
return to zero. Under normal conditions, this phase lasts for
between 11 to 140 clock pulses, but after a “heavy” overrange
conversion, it is extended to 740 clock pulses.
Differential Input
The input can accept differential voltages anywhere within the
common mode range of the input amplifier, or specifically from
0.5V below the positive supply to 1V above the negative supply.
In this range, the system has a CMRR of 86dB typical.
However, care must be exercised to assure the integrator
output does not saturate. A worst case condition would be a
large positive common mode voltage with a near full scale
negative differential input voltage. The negative input signal
drives the integrator positive when most of its swing has been
used up by the positive common mode voltage. For these
critical applications the integrator output swing can be reduced
to less than the recommended 2V full scale swing with little loss
of accuracy. The integrator output can swing to within 0.3V of
either supply without loss of linearity.
Differential Reference
The reference voltage can be generated anywhere within the
power supply voltage of the converter. The main source of
common mode error is a roll-over voltage caused by the
reference capacitor losing or gaining charge to stray
capacity on its nodes. If there is a large common mode
voltage, the reference capacitor can gain charge (increase
voltage) when called up to de-integrate a positive signal but
lose charge (decrease voltage) when called up to de-
integrate a negative input signal. This difference in reference
for positive or negative input voltage will give a roll-over
error. However, by selecting the reference capacitor such
that it is large enough in comparison to the stray
capacitance, this error can be held to less than 0.5 count
worst case. (See Component Value Selection.)
DISPLAY READING = 1000
V
IN
V
REF
---------------



DE-DE+
C
INT
C
AZ
R
INT
BUFFER
A-Z INT
-
+
A-Z
COMPARATOR
IN HI
COMMON
IN LO
31
32
30
DE- DE+
INT
A-Z
34
C
REF
+
36
REF HI
C
REF
REF LO
35
A-Z, A-Z,
33
C
REF
-
28 29 27
TO
DIGITAL
SECTION
A-Z AND DE(±)
INTEGRATOR
INT
STRAY STRAY
V+
10µA
V-
N
INPUT
HIGH
2.8V
6.2V
V+
1
INPUT
LOW
-
+
-
+
-
+
ZI ZI
AND ZI
ZI
26
FIGURE 2. ANALOG SECTION OF ICL7136
ICL7136
8
FN3086.6
July 21, 2005
Analog COMMON
This pin is included primarily to set the common mode
voltage for battery operation or for any system where the
input signals are floating with respect to the power supply.
The COMMON pin sets a voltage that is approximately 2.8V
more negative than the positive supply. This is selected to
give a minimum end-of-life battery voltage of about 6.8V.
However, analog COMMON has some of the attributes of a
reference voltage. When the total supply voltage is large
enough to cause the zener to regulate (>7V), the COMMON
voltage will have a low voltage coefficient (0.001%/V), low
output impedance (15), and a temperature coefficient
typically less than 150ppm/
o
C.
The limitations of the on chip reference should also be
recognized, however. Due to their higher thermal resistance,
plastic parts are poorer in this respect than ceramic. The
combination of reference Temperature Coefficient (TC), internal
chip dissipation, and package thermal resistance can increase
noise near full scale from 25µV to 80µV
P-P
. Also the linearity in
going from a high dissipation count such as 1000 (20 segments
on) to a low dissipation count such as 1111 (8 segments on) can
suffer by a count or more. Devices with a positive TC reference
may require several counts to pull out of an over range
condition. This is because over-range is a low dissipation
mode, with the three least significant digits blanked. Similarly,
units with a negative TC may cycle between over range and a
non-over range count as the die alternately heats and cools. All
these problems are of course eliminated if an external
reference is used.
The ICL7136, with its negligible dissipation, suffers from
none of these problems. In either case, an external
reference can easily be added, as shown in Figure 3.
Analog COMMON is also used as the input low return during
auto-zero and de-integrate. If IN LO is different from analog
COMMON, a common mode voltage exists in the system
and is taken care of by the excellent CMRR of the converter.
However, in some applications IN LO will be set at a fixed
known voltage (power supply common for instance). In this
application, analog COMMON should be tied to the same
point, thus removing the common mode voltage from the
converter. The same holds true for the reference voltage. If
reference can be conveniently tied to analog COMMON, it
should be since this removes the common mode voltage
from the reference system.
Within the lC, analog COMMON is tied to an N-Channel FET
that can sink approximately 3mA of current to hold the
voltage 2.8V below the positive supply (when a load is trying
to pull the common line positive). However, there is only
10µA of source current, so COMMON may easily be tied to a
more negative voltage thus overriding the internal reference.
TEST
The TEST pin serves two functions. On the ICL7136 it is
coupled to the internally generated digital supply through a
500 resistor. Thus it can be used as the negative supply for
externally generated segment drivers such as decimal points
or any other presentation the user may want to include on
the LCD display. Figures 4 and 5 show such an application.
No more than a 1mA load should be applied.
The second function is a “lamp test”. When TEST is pulled
high (to V+) all segments will be turned on and the display
should read “-1888”. The TEST pin will sink about 5mA
under these conditions.
CAUTION: On the ICL7136, in the lamp test mode, the segments have a
constant DC voltage (no square-wave) and may burn the LCD
display if left in this mode for several minutes.
ICL7136
V
REF LO
REF HI
V+
V-
6.8V
ZENER
I
Z
FIGURE 3A.
ICL7136
V
REF HI
REF LO
COMMON
V+
ICL8069
1.2V
REFERENCE
6.8k
20k
FIGURE 3B.
FIGURE 3. USING AN EXTERNAL REFERENCE
ICL7136
V+
BP
TEST
21
37
TO LCD
BACKPLANE
TO LCD
DECIMAL
POINT
1M
FIGURE 4. SIMPLE INVERTER FOR FIXED DECIMAL POINT
ICL7136
9
FN3086.6
July 21, 2005
Digital Section
Figures 6 shows the digital section for the ICL7136. In the
ICL7136, an internal digital ground is generated from a 6V
Zener diode and a large P-Channel source follower. This
supply is made stiff to absorb the relatively large capacitive
currents when the back plane (BP) voltage is switched. The
BP frequency is the clock frequency divided by 800. For
three readings/second this is a 60Hz square wave with a
nominal amplitude of 5V. The segments are driven at the
same frequency and amplitude and are in phase with BP
when OFF, but out of phase when ON. In all cases negligible
DC voltage exists across the segments.
The polarity indication is “on” for negative analog inputs. If IN
LO and IN HI are reversed, this indication can be reversed
also, if desired.
ICL7136
V+
BP
TEST
DECIMAL
POINT
SELECT
CD4030
GND
V+
TO LCD
DECIMAL
POINTS
FIGURE 5. EXCLUSIVE “OR” GATE FOR DECIMAL POINT DRIVE
FIGURE 6. ICL7136 DIGITAL SECTION
7
SEGMENT
DECODE
LCD PHASE DRIVER
LATCH
7
SEGMENT
DECODE
÷200
LOGIC CONTROL
INTERNAL
V
TH
= 1V
7
SEGMENT
DECODE
1000’s 100’s 10’s 1’s
TO SWITCH DRIVERS
FROM COMPARATOR OUTPUT
DIGITAL
GROUND
÷4
CLOCK
40 39 38
OSC 1
OSC 2
OSC 3
BACKPLANE
21
V+
TEST
V-
500
37
26
6.2V
COUNTER
COUNTER COUNTER COUNTER
1
THREE INVERTERS
ONLY ONE INVERTER SHOWN
FOR CLARITY
SEGMENT
OUTPUT
0.5mA
2mA
INTERNAL DIGITAL GROUND
TYPICAL SEGMENT OUTPUT
V+
c
a
b
c
d
f
g
e
a
b
a
b
c
d
f
g
e
a
b
c
d
f
g
e
ICL7136

ICL7136CPLZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
LCD Drivers ADC 3 5 DIG LW PWR 7106 COM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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