NCV7356
www.onsemi.com
10
TIMING DIAGRAMS
Figure 7. Wake−Up Filter Time Delay
V
CANH
V
RxD
t
t
t
WU
t
WUF
t
WU
t
WU
< t
WUF
V
ih
+ V
goff
wake−up
interrupt
Figure 8. Receive Blanking Time
V
ih
V
CANH
V
RxD
50%
V
TxD
50%
t
t
t
t
RB
NCV7356
www.onsemi.com
11
FUNCTIONAL DESCRIPTION
TxD Input Pin
TxD Polarity
TxD = logic 1 (or floating) on this pin produces an
undriven or recessive bus state (low bus voltage)
TxD = logic 0 on this pin produces either a bus normal
or a bus high voltage dominant state depending on the
transceiver mode state (high bus voltage)
If the TxD pin is driven to a logic low state while the sleep
mode (Mode 0 = 0 and Mode 1 = 0) is activated, the
transceiver can not drive the CANH pin to the dominant
state.
The transceiver provides an internal pull−up current on
the TxD pin (only in active modes [High−Speed Mode,
High Voltage Wake−Up, and Normal Mode]) which will
cause the transmitter to default to the bus recessive state
when TxD is not driven. The internal current source
circuitry limits the voltage pull−up level to be compatible
with 3.3 V logic. The TxD pull−up current source is not
active in Sleep Mode.
TxD input signals are standard CMOS logic levels.
Timeout Feature
In case of a faulty blocked dominant TxD input signal,
the CANH output is switched off automatically after the
specified TxD timeout reaction time to prevent a dominant
bus.
The transmission is continued by next TxD L to H
transition without delay.
MODE0 and MODE1 Pins
The transceiver provides a weak internal pulldown
current on each of these pins which causes the transceiver
to default to sleep mode when they are not driven. The
mode input signals are standard CMOS logic level for
3.3 V and 5 V supply voltages. See Electrical
Characteristics table for timing limitations for mode
changes.
MODE0 MODE1 Mode
L L Sleep Mode
H L High−Speed Mode
L H High Voltage Wake−Up
H H Normal Mode
Sleep Mode
Transceiver is in low power state, waiting for wake−up
via high voltage signal or by mode pins change to any state
other than 0,0. In this state, the CANH pin is not in the
dominant state regardless of the state of the TxD pin.
High−Speed Mode
This mode allows high−speed download with bit rates up
to 100 Kbit/s. The output wave shapingaping circuit is
disabled in this mode. Bus transmitter drive circuits for
those nodes which are required to communicate in
high−speed mode are able to drive reduced bus resistance
in this mode.
High Voltage Wake−Up Mode
This bus includes a selective node awake capability,
which allows normal communication to take place among
some nodes while leaving the other nodes in an undisturbed
sleep state. This is accomplished by controlling the signal
voltages such that all nodes must wake−up when they
receive a higher voltage message signal waveform. The
communication system communicates to the nodes
information as to which nodes are to stay operational
(awake) and which nodes are to put themselves into a non
communicating low power “sleep” state. Communication
at the lower, normal voltage levels shall not disturb the
sleeping nodes.
Normal Mode
Transmission bit rate in normal communication is
33 Kbits/s. In normal transmission mode the NCV7356
supports controlled waveform rise and overshoot times.
Waveform trailing edge control is required to assure that
high frequency components are minimized at the
beginning of the downward voltage slope. The remaining
fall time occurs after the bus is inactive with drivers off and
is determined by the RC time constant of the total bus load.
RxD Output Pin
Logic data as sensed on the single wire CAN bus.
RxD Polarity
RxD = logic 1 on this pin indicates a bus recessive
state (low bus voltage)
RxD = logic 0 on this pin indicates a bus normal or
high voltage bus dominant state
RxD in Sleep Mode
RxD does not pass signals to the microprocessor while in
sleep mode until a valid wake−up bus voltage level is
received or the MODE0 and MODE 1 pins are not 0, 0
respectively. When the valid wake−up bus voltage signal
awakens the transceiver, the RxD pin signals an interrupt
(logic 0). If there is no mode change within 250 ms (typ),
the transceiver re−enters the sleep mode.
When not in sleep mode all valid bus signals will be sent
out on the RxD pin.
RxD will be placed in the undriven or off state when in
sleep mode.
RxD Typical Load
Resistance: 2.7 kW
Capacitance: < 25 pF
NCV7356
www.onsemi.com
12
Bus LOAD Pin
Bus LOAD Pin Description
The bus LOAD pin provides a network load impedance
program point for the CAN bus. The value of the resistor
between the CANH and LOAD pins can be adjusted to
provide adequate impedance for the bus loading
requirements as dictated by the Single Wire CAN
Specification (J2411).
The resistor between CANH and LOAD pins provides a
pull down impedance for the CANH pin. The CANH driver
is a pull−up amplifier with no sink capability.
The bus LOAD pin also provides the detection circuitry
for loss of ground detection to insure there are no loading
effects on the bus should the ground connection be lost to
the NCV7356 device. During a system loss of ground
event, CANH with the 6.49 kW resistor between CANH and
LOAD will affect the bus with only between −50 mA and
10 mA of current (Bus Leakage Current During Loss of
Ground).
Resistor ground connection with internal open−on−loss−
of−ground protection
When the ECU experiences a loss of ground condition,
this pin is switched to a high impedance state.
The ground connection through this pin is not interrupted
in any transceiver operating mode including the sleep
mode. The ground connection only is interrupted when
there is a valid loss of ground condition.
This pin provides the bus load resistor with a path to
ground which contributes less than 0.1 V to the bus offset
voltage when sinking the maximum current through one
unit load resistor. This path exists in all operating modes,
including the sleep mode.
The transceivers maximum bus leakage current
contribution to V
ol
from the LOAD pin when in a loss of
ground state is 50 mA over all operating temperatures and
3.5 < V
BAT
< 27 V.
V
BAT
Input Pin
Vehicle Battery Voltage
The transceiver is fully operational as described in the
Electrical Characteristics Table over the range 6.0 V <
V
BAT
< 18 V as measured between the GND pin and the
V
BAT
pin.
For 5.0 V < V
Bat
< 6.0 V, the bus operates in normal
mode with reduced dominant output voltage and reduced
receiver input voltage. High voltage wake−up is not
possible (dominant output voltage is the same as in normal
or high−speed mode).
The transceiver operates in normal mode when 18 V <
V
Bat
< 27 V at 85°C for one minute.
CAN BUS
Input/Output Pin
The CANH pin is composed of a pull−up amplifier (no
sink capability) for driving the single−wire CAN bus. It is
designed to drive a 200 W load when operating in normal
mode and can operate higher 75 W loads for High−Speed
Mode. The minimum output driver capability is 50 mA, but
output shorts to ground can reach 350mA.
Normal CANH output voltages are between 4.4 V and
5.1 V. These amplitudes increase to between 9.9 V and 12.5 V
for selective system IC selection in WakeUp Mode.
The CANH pin also acts as a bus read amplifier. The Bus
Wake−Up from Sleep Input Voltage Threshold is between
6.6 V and 7.9 V, but to maintain normal communication,
the threshold is 2.1 V.
Wave Shaping in Normal and High Voltage Wake−Up
Mode
Wave shaping is incorporated into the transmitter to
minimize EMI radiated emissions. An important
contributor to emissions is the rise and fall times during
output transitions at the “corners” of the voltage waveform.
The resultant waveform is one half of a sin wave of
frequency 50−65 kHz at the rising waveform edge and one
quarter of this sin wave at falling or trailing edge.
Wave Shaping in High−Speed Mode
Wave shaping control of the rising and falling waveform
edges are disabled during high−speed mode. EMI
emissions requirements are waived during this mode. The
waveform rise time in this mode is less than 1.0 ms.
Short Circuits
If the CAN BUS pin is shorted to ground for any duration
of time, the current is limited as specified in the Electrical
Characteristics Table until an overtemperature shutdown
circuit disables the output high side drive source transistor
preventing damage to the IC.
Loss of Ground
In case of a valid loss of ground condition, the LOAD pin
is switched into high impedance state. The CANH
transmission is continued until the undervoltage lock out
voltage threshold is detected.
Loss of Battery
In case of loss of battery (V
BAT
= 0 or open) the
transceiver does not disturb bus communication. The
maximum reverse current into the power supply system
(V
BAT
) doesn’t exceed 500 mA.
INH Pin (14 pin package only)
The INH pin is a high−voltage highside switch used to
control the ECU’s regulated microcontroller power supply.
After power−on, the transceiver automatically enters an
intermediate standby mode, the INH output will go high
(up to V
BAT
) turning on the external voltage regulator. The
external regulator provides power to the ECU. If there is no
mode change within 250 ms (typ), the transceiver re−enters
the sleep mode and the INH output goes to logic 0
(floating).
When the transceiver has detected a valid wake−up
condition (bus HVWU traffic which exceeds the wake−up
filter time delay) the INH output will become high (up to

NCV7356D2R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC SINGLE WIRE CAN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union