4
4952J–AUTO–03/11
Atmel ATA6836
2. Pin Configuration
2.1 SO28
Figure 2-1. Pinning SO28
OUT5
OUT5
OUT4
OUT4
VS
GND
GND
GND
GND
VS
OUT3
OUT3
OUT2
OUT2
OUT6
OUT6
DI
CLK
CS
GND
GND
GND
GND
VCC
DO
INH
OUT1
OUT1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Table 2-1. Pin Description SO28
Pin Symbol Function
1, 2 OUT5
Half-bridge output 5; formed by internally connected power MOS high-side switch 5 and low-side switch 5
with internal reverse diodes; short circuit protection; overtemperature protection; diagnosis for short and
open load
3, 4 OUT4 Output 4; see pin 1
5 VS Power supply output stages HS4, HS5, HS6, internal supply; external connection to pin 10 necessary
6, 7, 8, 9 GND Ground; reference potential; internal connection to pins 20 to 23; cooling tab
10 VS Power supply output stages HS1, HS2 and HS3
11, 12 OUT3 Output 3; see pin 1
13, 14 OUT2 Output 2; see pin 1
15, 16 OUT1 Output 1; see pin 1
17 INH Inhibit input, 5V logic input with internal pull down, low = standby, high = normal operation
18 DO
Serial data output, 5V CMOS logic level tri-state output for output (status) register data, sends 16-bit status
information to the microcontroller (LSB is transferred first). Output will remain tri-stated unless device is
selected by CS = low; therefore, several ICs can operate on one data output line only
19 VCC Logic supply voltage (5V)
20, 21,
22, 23
GND Ground, see pins 6 to 9
24 CS
Chip select input, 5V CMOS logic level input with internal pull up;
low = serial communication is enabled, high = disabled
25 CLK
Serial clock input, 5V CMOS logic level input with internal pull down,
controls serial data input interface and internal shift register (f
max
= 2MHz)
26 DI
Serial data input; 5V CMOS logic level input with internal pull down; receives serial data from the control
device; DI expects a 16-bit control word with LSB being transferred first
27, 28 OUT6 Output 6; see pin 1
5
4952J–AUTO–03/11
Atmel ATA6836
2.2 QFN24
Figure 2-2. Pinning QFN 24, 5 × 5, 0.65mm pitch
Note: YWW Date code (Y = Year above 2000, WW = week number)
ATAxyz Product name
ZZZZZ Wafer lot number
AL Assembly sub-lot number
OUT4 SENSE
OUT4
VS
VS
OUT3
OUT3 SENSE
CLK
CS
GND SENSE
NC
VCC
DO
NC
OUT5
OUT5 SENSE
OUT6 SENSE
OUT6
DI
NC
OUT2
OUT2 SENSE
OUT1 SENSE
OUT1
INH
1
2
3
4
5
6
18
17
16
15
14
13
78910 1211
24 23 22 21 1920
Table 2-2. Pin Description QFN24
Pin Symbol Function
1 OUT4 SENSE Only for testability in final test
2OUT4
Half-bridge output 4; formed by internally connected power MOS high-side switch 4 and low-side switch 4
with internal reverse diodes; short circuit protection; overtemperature protection; diagnosis for short and
open load
3 VS Power supply output stages HS4, HS5 and HS6
4 VS Power supply output stages HS1, HS2 and HS3
5 OUT3 Output 3; see pin 1
6 OUT3 SENSE Only for testability in final test
7 NC Internal bond to GND
8 OUT2 Output 2; see pin 1
9 OUT2 SENSE Only for testability in final test
10 OUT1 SENSE Only for testability in final test
11 OUT1 Output 1; see pin 1
12 INH Inhibit input; 5V logic input with internal pull down; low = standby, high = normal operation
13 DO
Serial data output; 5V CMOS logic level tri-state output for output (status) register data; sends 16-bit status
information to the microcontroller (LSB is transferred first). Output will remain tri-stated unless device is
selected by CS = low, therefore, several ICs can operate on one data output line only
14 VCC Logic supply voltage (5V)
15 NC Internal bond to GND
16 GND SENSE Ground; reference potential; internal connection to the lead frame; cooling tab
6
4952J–AUTO–03/11
Atmel ATA6836
17 CS
Chip select input; 5V CMOS logic level input with internal pull up;
low = serial communication is enabled, high = disabled
18 CLK
Serial clock input; 5V CMOS logic level input with internal pull down;
controls serial data input interface and internal shift register (f
max
= 2MHz)
19 DI
Serial data input; 5V CMOS logic level input with internal pull down; receives serial data from the control
device; DI expects a 16-bit control word with LSB being transferred first
20 OUT6 Output 6; see pin 1
21 OUT6 SENSE Only for testability in final test
22 OUT5 SENSE Only for testability in final test
23 OUT5 Output 5; see pin 1
24 NC Internal bond to GND
Table 2-2. Pin Description QFN24 (Continued)
Pin Symbol Function

ATA6836C-PXQW

Mfr. #:
Manufacturer:
Microchip Technology
Description:
Gate Drivers 650mA Hex Half Bridge Driver
Lifecycle:
New from this manufacturer.
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