AD7740
REV. C
–9–
A/D Conversion Techniques Using the AD7740
One method of using a VFC in an A/D system is to count the
output pulses of FOUT for a fixed gate interval (see Figure 9).
This fixed gate interval should be generated by dividing down
the clock input frequency. This ensures that any errors due to
clock jitter or clock frequency drift are eliminated. The ratio of
the FOUT frequency to the clock frequency is what is important
here, not the absolute value of FOUT. The frequency divi-
sion can be done by a binary counter where CLKIN is the
counter input.
FREQUENCY
DIVIDER
GATE
SIGNAL
FOUT
VIN
TO P
AD7740
COUNTER
CLOCK
GENERATOR
CLKIN
Figure 9. A/D Conversion Using the AD7740 VFC
Figure 10 shows the waveforms of CLKIN, FOUT, and the
Gate signal. A counter counts the rising edges of FOUT while the
Gate signal is high. Since the gate interval is not synchronized with
FOUT, there is a possibility of a counting inaccuracy. Depending
on FOUT, an error of one count may occur.
GATE
t
GATE
FOUT
CLKIN
Figure 10. Waveforms in an A/D Converter Using a VFC
The clock frequency and the gate time determine the resolution
of such an ADC. If 12-bit resolution is required and CLKIN is
1 MHz (therefore, FOUT
MAX
is 0.9 MHz), the minimum gate
time required is calculated as follows:
N counts at Full Scale (0.9 MHz) will take
(N/0.9 × 10
6
) seconds = minimum gate time
N is the total number of codes for a given resolution; 4096 for
12 bits.
minimum gate time = (4096/0.9 × 10
6
) seconds = 4.551 ms
Since T
GATE
× FOUT
MAX
= number of counts at full scale, the
fastest conversion for a given resolution can be performed with
the highest CLKIN frequency.
If the output frequency is measured by counting pulses gated to
a signal derived from the clock, the clock stability is unimportant
and the device simply performs as a voltage-controlled frequency
divider, producing a high-resolution ADC. The inherent mono-
tonicity of the transfer function and wide range of input clock
frequencies allows the conversion time and resolution to be
optimized for specific applications.
Another parameter is taken into account when choosing the
length of the gate interval. Because the integration period of the
VFC is equal to the gate interval, any interfering signal can be
rejected by counting for an integer number of periods of the
interfering signal. For example, a gate interval of 100 ms will
give normal-mode rejection of 50 Hz and 60 Hz signals.
Isolation Applications
The AD7740 can also be used in isolated analog signal trans-
mission applications. Due to noise, safety requirements or distance,
it may be necessary to isolate the AD7740 from any controlling
circuitry. This can easily be achieved by using opto-isolators.
This is extremely useful in overcoming ground loops between
equipment.
The analog voltage to be transmitted is converted to a pulse
train using the VFC. An opto-isolator circuit is used to couple
this pulse train across an isolation barrier using light as the
connecting medium. The input LED of the isolator is driven
from the output of the AD7740. At the receiver side, the output
transistor is operated in the photo-transistor mode. The pulse
train can be reconverted to an analog voltage using a frequency-
to-voltage converter; alternatively, the pulse train can be fed into
a counter to generate a digital signal.
The analog and digital sections of the AD7740 have been designed
to allow operation from a single-ended power source, simplify-
ing its use with isolated power supplies.
Figure 11 shows a general purpose VFC circuit using a low cost
opto-isolator. A 5 V power supply is assumed for both the iso-
lated (V
DD
) and local (V
CC
) supplies.
VIN
FOUT
GND1
V
CC
GND2
ISOLATION
BARRIER
R
0.1F 10F
AD7740
V
DD
OPTOCOUPLER
Figure 11. Opto-Isolated Application
