LTC3545/LTC3545-1
3
35451fb
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3545E/LTC3545E-1 are guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3545I/LTC3545I-1 are guaranteed to meet performance specifi cations
over the full –40°C to 125°C operating junction temperature range.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
)(68°C/W)
This IC includes overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperature
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
LOADREG
Output Voltage Load Regulation (Notes 5, 6) 0.5 %
I
FBx
Feedback Pin Leakage (Note 5) 80 nA
I
S
Input DC Bias Current (All Regulators Enabled)
Pulse Skip (Active Mode)
Burst Mode Operation (All Regulators Sleeping)
Shutdown (RUN
X
= 0V)
I
LOAD
= 0A, 2.25MHz
V
FBx
= 0.5V
V
FBx
= 0.7V
680
58
0.1
750
70
2.0
µA
µA
µA
f
OSC
Oscillator Frequency
●
1.8 2.25 2.7 MHz
f
SYNC
Synchronization Frequency LTC3545 Only
●
13MHz
V
RUN(HIGH)
RUNx Input High Voltage
●
1V
V
RUN(LOW)
RUNx Input Low Voltage
●
0.3 V
I
RUNx
RUN Leakage Current ±0.1 ±1 µA
I
LSWx
SWx Leakage V
RUNx
= 0V, V
SWx
= 0V or 5.5V, V
IN
= 5.5V ±0.1 ±1 µA
I
SYNC
SYNC Leakage V
RUN
= 0V, V
SYNC
= 0V or 5.5V,
V
IN
= 5.5V
±0.1 ±1 µA
T
PGOODx
Power Good Threshold–Deviation From V
FB
Steady State (0.6V)
V
FBx
Ramping Up
V
FBx
Ramping Down
–7.5
–10
%
%
R
PGOODx
Power Good Pull-Down On-Resistance I
PGD
= 50mA
●
14 50
Ω
MODE/SYNC Thresholds 0.93 V
Individual Regulator Characteristics (One Regulator Enabled)
t
SS
Soft-Start Period V
FBx
= 10% to 90% Fullscale 850 1100 µs
I
PK
Peak Switch Current Limit 1 1.3 1.6 A
I
Q
Input DC Bias Current
Pulse Skip (Active Mode)
Burst Mode Operation (Sleeping)
I
LOAD
= 0A, 2.25MHz
V
FBx
= 0.5V
V
FBx
= 0.7V
310
31
µA
µA
R
PFET
R
DS(ON)
of P-Channel FET (Note 7) I
SWx
= 100mA 0.35
Ω
R
NFET
R
DS(ON)
of N-Channel FET (Note 7) I
SWx
= –100mA 0.35
Ω
V
UVLO
Undervoltage Lockout (High V
CC
to Low)
●
1.8 2.25 V
ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
IN
= PV
IN
= 3.6V unless otherwise noted. (Note 3)
will exceed 125°C when overtemperature is active. Continuous operation
above the specifi ed maximum operating junction temperature may impair
device reliability.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
Note 5: The LTC3545/LTC3545-1 are tested in a proprietary test mode that
connects V
FB
to the output of the error amplifi er.
Note 6: Load regulation is inferred by measuring the regulation loop gain.
Note 7: The QFN switch-on resistance is guaranteed by correlation to
water level measurements.
Note 8: Guaranteed by long-term current density limitations.
