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LTC3545EUD#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC3545/LTC3545-1
13
35451fb
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment for C
OUT
has been met, the RMS current rating
generally far exceeds the I
RIPPLE(P-P)
requirement. The
output ripple ΔV
OUT
is determined by:
ΔΔV I ESR
C
OUT L
OUT
≅+
⎛
⎝
⎜
⎞
⎠
⎟
1
8 ••ƒ
where f = operating frequency, C
OUT
= output capacitance
and ΔI
L
= ripple current in the inductor. For a fi xed output
voltage, the output ripple is highest at maximum input
voltage since ΔI
L
increases with input voltage.
Using Ceramic Input and Output Capacitors
Higher value, lower cost, ceramic capacitors are now
widely available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them
ideal for switching regulator applications. Because the
LTC3545/LTC3545-1’s control loop does not depend on
the output capacitor’s ESR for stable operation, ceramic
capacitors can be used freely to achieve very low output
ripple and small circuit size.
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, V
IN
. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at V
IN
, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
The output voltage is set by tying V
FB
to a resistive divider
according to the following formula:
VV
R
R
OUT
=+
⎛
⎝
⎜
⎞
⎠
⎟
06 1
2
1
.
The external resistive divider is connected to the output
allowing remote voltage sensing as shown in Figure 2.
APPLICATIONS INFORMATION
Figure 2. Setting the LTC3545 Output Voltage
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the effi ciency and which change would produce
the most improvement. Effi ciency can be expressed as:
Effi ciency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc.
are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3545/LTC3545-1 circuits: V
IN
quiescent cur-
rent and I
2
R losses. V
IN
quiescent current loss dominates
the effi ciency loss at low load currents, whereas the I
2
R
loss dominates the effi ciency loss at medium to high load
currents. In a typical effi ciency plot, the effi ciency curve at
very low load currents can be misleading since the actual
power lost is of little consequence as illustrated on the
front page of the data sheet.
V
FB
GND
LTC3545
0.6V ≤ V
OUT
≤ 5.5V
R2
R1
3545 F02
LTC3545/LTC3545-1
14
35451fb
1. The quiescent current is due to two components: the
DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
from switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge, dQ, moves
from PV
IN
to ground. The resulting dQ/dt is the current out
of PV
IN
that is typically larger than the DC bias current and
proportional to frequency. Both the DC bias and gate charge
losses are proportional to PV
IN
and thus their effects will
be more pronounced at higher supply voltages.
2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
, and external inductor R
L
. In con-
tinuous mode, the average output current fl owing through
inductor L is “chopped” between the main switch and the
synchronous switch. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET R
DS(ON)
and the duty cycle (DC) as follows:
R
SW
= (R
DS(ON)TOP
)(DC) + (R
DS(ON)BOT
)(1 – DC)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
2
R losses, simply add R
SW
to
R
L
and multiply the result by the square of the average
output current.
Other losses when in switching operation, including C
IN
and C
OUT
ESR dissipative losses and inductor core losses,
generally account for less than 2% total additional loss.
Thermal Considerations
The LTC3545/LTC3545-1 requires the package backplane
metal to be well soldered to the PC board. This gives the
QFN package exceptional thermal properties, making
it diffi cult in normal operation to exceed the maximum
junction temperature of the part. In most applications the
LTC3545/LTC3545-1 do not dissipate much heat due to
their high effi ciency. In applications where the LTC3545/
LTC3545-1 are running at high ambient temperature
with low supply voltage and high duty cycles, such as in
dropout, the heat dissipated may exceed the maximum
junction temperature of the part if it is not well thermally
grounded. If the junction temperature reaches approxi-
mately 150°C, the power switches will be turned off and
the SW nodes will become high impedance.
To prevent the LTC3545/LTC3545-1 from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T
R
= P
D
• θ
JA
where P
D
is the power dissipated by the regulator and θ
JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider one channel of the LTC3545/
LTC3545-1 in dropout at an input voltage of 2.5V, a load
current of 800mA, and an ambient temperature of 85°C.
From the typical performance graph of switch resistance,
the R
DS(ON)
of the P-channel switch at 85°C can be es-
timated as 0.42Ω. Therefore, power dissipated by the
channel is:
P
D
= I
LOAD
2
• R
DS(ON)
= 0.27W
The θ
JA
for the 3mm × 3mm QFN package is 68°C/W. The
temperature rise due to this power dissipation is:
T
R
= θ
JA
• P
D
= 18°C
And a junction temperature of:
T
J
= 85°C + 18°C = 103°C
which is below the maximum junction temperature of
125°C. This would not be the case if all three channels
were operating at 800mA in dropout. Then T
R
= 55°C,
limiting the allowed ambient temperature in this scenario
to less than 70°C.
APPLICATIONS INFORMATION
LTC3545/LTC3545-1
15
35451fb
Similar situations can occur when all three channels are
operating at maximum loads at high ambient temperature.
As an example, consider a channel supplying 800mA at
1.8V output and 85% effi ciency. The dissipated power can
be calculated using
Loss P
E
E
WW
O
=
⎛
⎝
⎜
⎞
⎠
⎟
==
1
14 017 025
–
.•. .
where P
O
is the output power and E is the effi ciency.
In this case the temperature rise is 17°C, similar to the
dropout scenario described above. Whereas one channel
operating at these levels will safely fall within the tem-
perature limitations of the part, three channels operating
simultaneously at these levels will place limits on the peak
ambient temperature.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance R
DS(ON)
.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to (ΔI
LOAD
• ESR), where ESR is the effective series
resistance of C
OUT
. ΔI
LOAD
also begins to charge or dis-
charge C
OUT
, which generates a feedback error signal. The
regulator loop then acts to return V
OUT
to its steady-state
value. During this recovery time V
OUT
can be monitored
for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in paral-
lel with C
OUT
, causing a rapid drop in V
OUT
. No regulator
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately (25
• C
LOAD
). Thus, a 10F capacitor charging to 3.3V would
require a 250s rise time, limiting the charging current
to about 130mA.
APPLICATIONS INFORMATION
Design Example
As a design example, consider using the LTC3545/LTC3545-
1 in a portable application with a Li-Ion battery. The battery
provides V
IN
ranging from 2.8V to 4.2V. The demand on
one channel at 2.5V is 600mA. Using this channel as an
example, fi rst calculate the inductor value for 40% ripple
current (240mA in this example) at maximum V
IN
. Using
a form of Equation 1:
L
V
MHz mA
V
V
1
25
2 25 240
1
25
36
14=
()()
⎛
⎝
⎜
⎞
⎠
⎟
=
.
.
–
.
.
.11µ H
Use the closest standard value of 1.5µH. For low ripple
applications, 10µF is a good choice for the output capacitor.
A smaller output capacitor will shorten transient response
settling time, but also increase the load transient ripple. A
value for C5 = 4.7µF should suffi ce as the source imped-
ance of a Li-Ion battery is very low. C5 and C1 both provide
switching current to the output power switches. They
should be placed as close a possible to the chip between
V
IN
/GNDA and PV
IN
/PGND respectively. PV
IN
and PGND
are the supply and return power paths for both channels
2 and 3, so a value of 10µF for C1 is appropriate. The
feedback resistors program the output voltage. Minimiz-
ing the current in these resistors will maximize effi ciency
at very light loads, but totals on the order of 200k are a
good compromise between effi ciency and immunity to
any adverse effects of PCB parasitic capacitance on the
feedback pins. Choosing 10µA as the feedback current with
0.6V feedback voltage makes R4 = 60k. A close standard
1% resistor is 60.4k. Using:
R
V
V
Rk3
25
06
1 4 191 1=
⎛
⎝
⎜
⎞
⎠
⎟
=
.
.
–• .
The closest standard 1% resistor is 191k. A 20pF feed-
forward capacitor is recommended to improve transient
response. The component values for the other channels
are chosen in a similar fashion. Figure 4 shows the com-
plete schematic for this example, along with the effi ciency
curve and burst mode ripple at an output current for the
2.5V output.
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LTC3545EUD#PBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Triple 800mA Synchronous Buck Converter in QFN
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