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ADM705AR

P1-P3P4-P6P7-P9P10-P12
Low Cost Microprocessor
Supervisory Circuits
Data Sheet
ADM705/ADM706/ADM707/ADM708
Rev. H Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700 ©2002–2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Guaranteed
RESET
valid with V
CC
= 1 V
190 μA quiescent current
Precision supply voltage monitor
4.65 V (ADM705/ADM707)
4.40 V (ADM706/ADM708)
200 ms reset pulse width
Debounced TTL/CMOS manual reset input (
MR
)
Independent watchdog timer (ADM705/ADM706)
1.60 sec timeout (ADM705/ADM706)
Active high reset output (ADM707/ADM708)
Voltage monitor for power fail or low battery warning
Superior upgrade for MAX705 to MAX708
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Critical microprocessor supply monitoring
FUNCTIONAL BLOCK DIAGRAMS
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
INPUT (WDI)
POWER-FAIL
INPUT (PFI)
POWER-FAIL
OUTPUT (PFO)
WATCHDOG
OUTPUT (WDO)
RESET
*
VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706)
ADM705/
ADM706
RESET AND
WATCHDOG
TIMEBASE
RESET
GENERATOR
MR
V
CC
250μA
V
CC
WATCHDOG
TIMER
4.65V*
1.25V
00088-001
Figure 1. ADM705/ADM706
1.25V
POWER-FAIL
INPUT (PFI)
RESET
* VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708)
ADM707/
ADM708
RESET
GENERATOR
MR
V
CC
250μA
V
CC
RESET
00088-002
4.65V*
POWER-FAIL
OUTPUT (PFO)
Figure 2. ADM707/ADM708
GENERAL DESCRIPTION
The ADM705/ADM706/ADM707/ADM708 microprocessor
supervisory circuits are suitable for monitoring 5 V power
supplies/batteries and microprocessor activity.
The ADM705/ADM706 provide power-supply monitoring
circuitry that generate a reset output during power-up, power-
down, and brownout conditions. The reset output remains
operational with V
CC
as low as 1 V. Independent watchdog
monitoring circuitry is also provided. This is activated if the
watchdog input has not been toggled within 1.60 sec.
In addition, there is a 1.25 V threshold detector to warn of
power failures, to detect low battery conditions, or to monitor an
additional power supply. An active low, debounced manual reset
input (
MR
) is also included.
The ADM705 and ADM706 are identical except for the reset
threshold monitor levels, which are 4.65 V and 4.40 V, respectively.
The ADM707 and ADM708 provide a similar functionality to
the ADM705 and ADM706 and only differ in that a watchdog
timer function is not available. Instead, an active high reset
output (RESET) is available as well as the active low reset output
(
RESET
). The ADM707 and ADM708 are identical except for
the reset threshold monitor levels, which are 4.65 V and 4.40 V,
respectively.
All devices are available in narrow 8-lead PDIP and 8-lead SOIC
packages.
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Circuit Information .......................................................................... 8
Power Fail
RESET
Output ............................................................8
Manual Reset ..................................................................................8
Watchdog Timer (ADM705/ADM706) .....................................8
Power Fail Comparator .................................................................8
Valid
RESET
Below 1 V V
CC
........................................................9
Applications Information .............................................................. 10
Monitoring Additional Supply Levels ...................................... 10
Microprocessor with Bidirectional RESET ............................. 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 12
REVISION HISTORY
1/16—Rev. G to Rev. H
Changes to Table 3 ............................................................................ 5
Changes to Power Fail Comparator Section and Figure 15 ........ 8
Changes to Figure 16 ........................................................................ 9
Changes to Figure 18 and Figure 20 ............................................. 10
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
3/08—Rev. F to Rev. G
Changes to Applications .................................................................. 1
Changes to Table 2 ............................................................................ 4
Changes to Figure 9 .......................................................................... 6
Changes to Figure 10, Figure 11, and Figure 12 ........................... 7
Changes to Figure 14 ........................................................................ 8
Changes to Ordering Guide .......................................................... 12
2/07—Rev. E to Rev. F
Updated Format .................................................................. Universal
Changes to Watchdog Timeout Period .......................................... 3
Replaced Pin Configurations and Function Descriptions Section .. 5
7/06—Rev. D to Rev. E
Added RM-8 (MSOP) Package ......................................... Universal
Changes to Table 2 ............................................................................. 4
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
11/05—Rev. C to Rev. D
Updated Format .................................................................. Universal
Deleted Figure 2 ................................................................................. 4
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 12
8/02—Rev. B to Rev. C
Removed RM-8 (µSOIC) Package .................................... Universal
Updated N-8 and R-8 Packages ....................................................... 8
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 3 of 12
SPECIFICATIONS
V
CC
= 4.75 V to 5.5 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
POWER SUPPLY
V
CC
Operating Voltage Range 1.0
5.5 V
Supply Current
190 250 µA
LOGIC OUTPUT
Reset Threshold 4.5 4.65 4.75 V ADM705/ADM707
4.25
4.40
4.50
V
ADM706/ADM708
Reset Threshold Hysteresis
40
mV
RESET PULSE WIDTH 160 200 280 ms
RESET
OUTPUT VOLTAGE
V
CC
− 1.5
V I
SOURCE
= 800 µA
0.4 V I
SINK
= 3.2 mA
0.3 V V
CC
= 1 V, I
SINK
= 50 µA
0.3 V V
CC
= 1.2 V, I
SINK
= 100 µA
RESET OUTPUT VOLTAGE V
CC
− 1.5
V ADM707/ADM708, I
SOURCE
= 800 µA
0.4 V ADM707/ADM708, I
SINK
= 1.2 mA
WATCHDOG TIMEOUT PERIOD (t
WD
) 1.00 1.60 2.25 sec V
IL
= 0.4 V, V
IH
= V
CC
× 0.8, WDI = V
CC
WDI Pulse Width (t
WP
)
50
ns
WATCHDOG INPUT
WDI Input Threshold
Logic Low
0.8 V
Logic High 3.5
V
WDI Input Current
50 150 µA WDI = 0 V
−150 −50
µA WDI = 0 V
WDO
OUTPUT VOLTAGE
V
CC
− 1.5
V I
SOURCE
= 800 µA
0.4 V I
SINK
= 1.2 mA
MANUAL RESET INPUT
MR
Pull-Up Current
100 250 600 µA
MR
= 0 V
MR
Pulse Width 150
ns
MR
INPUT THRESHOLD
Logic Low
0.8
V
Logic High
2.0
V
MR
TO RESET OUTPUT DELAY
250 ns
POWER FAIL INPUT
PFI Input Threshold 1.2 1.25 1.3 V
PFI Input Current −25 +0.01 +25 nA
PFO
OUTPUT VOLTAGE V
CC
− 1.5
V I
SOURCE
= 800 µA
0.4
V
I
SINK
= 3.2 mA
P1-P3P4-P6P7-P9P10-P12

ADM705AR

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Supervisory Circuits 5V CMOS MPU IC
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