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VEML6075

P1-P3P4-P6P7-P9P10-P11
VEML6075
www.vishay.com
Vishay Semiconductors
Rev. 1.2, 23-Nov-16
4
Document Number: 84304
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PARAMETER TIMING INFORMATION
Fig. 2 - I
2
C Bus Timing for Sending Word Command Format
Fig. 3 - I
2
C Timing for Receive Word Command Format
ACK by
VEML6075
ACK by
VEML6075
ACK by
VEML6075
ACK by
VEML6075
I
2
C bus
clock
(SCLK)
I
2
C bus
data
(SDAT)
I
2
C bus
clock
(SCLK)
I
2
C bus
data
(SDAT)
I
2
C bus slave address byte Command code
Start by
master
Stop by
master
Data byte low Data byte high
SA7 SA1SA2SA3SA4SA5SA6 SA7 SA1SA2SA3SA4SA5SA6 SA0
SA7 SA1SA2SA3SA4SA5SA6 SA0
SA7
SA1SA2SA3SA4SA5SA6
SA0
W
ACK by
VEML6075
ACK by
VEML6075
ACK by
VEML6075
I
2
C bus
clock
(SCLK)
I
2
C bus
data
(SDAT)
I
2
C bus slave address byte Command code
Start by
master
SA7 SA1SA2SA3SA4SA5SA6 SA7 SA1SA2SA3SA4SA5SA6
SA0
W
I
2
C bus
clock
(SCLK)
I
2
C bus
data
(SDAT)
Data byte low
Data byte high
ACK by
master
Start by
master
I
2
C bus slave address byte
I
2
C bus
clock
(SCLK)
I
2
C bus
data
(SDAT)
ACK by
master
Stop by
master
SA7 SA1SA2SA3SA4SA5SA6
SA7 SA1SA2SA3SA4SA5SA6 SA0
R
SA7 SA1SA2SA3SA4SA5SA6 SA0
VEML6075
www.vishay.com
Vishay Semiconductors
Rev. 1.2, 23-Nov-16
5
Document Number: 84304
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL PERFORMANCE CHARACTERISTICS (T
amb
= 25 °C, unless otherwise specified)
Fig. 4 - Normalized Spectral Response Fig. 5 - Normalized Output vs. View Angle
APPLICATION INFORMATION
Pin Connection with the Host
The configuration and data registers of the VEML6075 are accessed via the I
2
C interface. The hardware schematic is shown
below in fig. 6.
The 0.1 μF capacitor near the V
DD
pin is used for power supply noise rejection. The 2.2 kΩ is suitable for the pull high resistor
of I
2
C.
Fig. 6 - Hardware Pin Connection Diagram
10
100
1000
10000
0
10
20
30
40
50
60
70
80
90
100
300 350 400 450 500 550 600
Axis Title
1st line
2nd line
2nd line
Normalized Output (%)
λ - Wavelength (nm)
2nd line
UVB
UVA
UV
comp2
UV
comp1
0
10
20
30
40
50
60
70
80
90
100
-90 -60 -30 0 30 60 90
Axis Title
2nd line
Normalized Output (%)
Angle (deg)
2nd line
Cosine
UV-A
UV-B
10
100
1000
10000
1st line
2nd line
I
2
C bus data SDA
I
2
C bus clock SCL
SDA (2)
SCL (3)
GND (1)
V
DD
(4)
C1
100 nF
1.7 V to 3.6 V
1.7 V to 3.6 V
R2R1
Host
Micro Controller
VEML6075
VEML6075
www.vishay.com
Vishay Semiconductors
Rev. 1.2, 23-Nov-16
6
Document Number: 84304
For technical questions, contact: sensorstechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Digital Interface
The VEML6075 contains a CONF register (00h) used for operation control and parameter setup. Measurement results are stored
in four separate registers, one each for UVA, UVD, UVB, UV
comp1
, and UV
comp2
(07h to 0Bh respectively). All registers are
accessible via I
2
C communication. Fig. 7 shows the basic I
2
C communication with the VEML6075. Each of the registers in the
VEML6075 are 16 bit wide, so 16 bit should be written when a write command is sent, and 16 bit should be read when a read
command is sent.
The built in I
2
C interface is compatible with I
2
C modes “standard” and “fast”: 100 kHz to 400 kHz
Fig. 7 - Command Protocol Format
Note
• Please note the repeat start condition when data is read from the sensor. A stop condition should not be sent here.
Slave Address and Function Description
VEML6075 uses 0x10 slave address for 7-bit I
2
C addressing protocol. VEML6075 has 16-bit resolution for each channel (UVA,
UVB, UV
comp1
, and UV
comp2
).
TABLE 1 - VEML6075 COMMAND CODE AND REGISTER DESCRIPTION
COMMAND
CODE
DATE BYTE
LOW / HIGH
REGISTER NAME R / W DEFAULT VALUE FUNCTION DESCRIPTION
00h
L UV_CONF R / W 0x00 UV integration time, function enable and disable
H Reserved R / W 0x00 Reserved
01h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
02h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
03h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
04h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
05h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
06h
L Reserved R / W 0x00 Reserved
H Reserved R / W 0x00 Reserved
07h
L UVA_Data R 0x00 UVA LSB output data
H UVA_Data R 0x00 UVA MSB output data
08h
L Reserved R 0x00 Reserved
H Reserved R 0x00 Reserved
09h
L UVB_Data R 0x00 UVB LSB output data
H UVB_Data R 0x00 UVB MSB output data
0Ah
L UVCOMP1_Data R 0x00 UV
comp1
LSB output data
H UVCOMP1_Data R 0x00 UV
comp1
MSB output data
0Bh
L UVCOMP2_Data R 0x00 UV
comp2
LSB output data
H UVCOMP2_Data R 0x00 UV
comp2
MSB output data
0Ch
L ID R 0x26 Device ID LSB
H ID R 0x00 Device ID MSB
S Slave address
Wr
A Command code A Data byte low A Data byte high A
17 811 1
818
P
11
Send Word ɦġWrite Command to VEML6075
1
Slave address
7
Wr
A Command code A S Slave address
Rd
A Data byte low A
Data byte high A P
11811711818 11
S
Receive Word ɦġRead Data from VEML6075
S = start condition
P = stop condition
A = acknowledge
Shaded area = VEML6075 acknowledge
P1-P3P4-P6P7-P9P10-P11

VEML6075

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