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8N3DV85FC-0007CDI8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
IDT8N3DV85CCD REVISION A OCTOBER 30, 2013 4 ©2013 Integrated Device Technology, Inc.
IDT8N3DV85 Data Sheet LVPECL DUAL-FREQUENCY PROGRAMMABLE VCXO
Principles of Operation
The block diagram consists of the internal 3rd overtone crystal and
oscillator which provide the reference clock f
XTAL
of 114.285MHz.
The PLL includes the FemtoClock
®
VCO along with the Pre-divider
(P), the feedback divider (M) and the post divider (N). The P, M, and
N dividers determine the output frequency based on the f
XTAL
reference. The feedback divider is fractional supporting a huge
number of output frequencies. Internal registers are used to hold up
to two different factory pre-set configuration settings. The
configuration is selected via the FSEL pin. Changing the FSEL
control results in an immediate change of the output frequency to the
selected register values. The P, M, and N frequency configurations
support an output frequency range 15.476MHz to 866.67MHz and
975MHz to 1,300MHz.
The devices use the fractional feedback divider with a delta-sigma
modul
ator for noise shaping and robust frequency synthesis
capability. The relatively high reference frequency minimizes phase
noise generated by frequency multiplication and allows more efficient
shaping of noise by the delta-sigma modulator. The output frequency
is determined by the 2-bit pre-divider (P), the feedback divider (M)
and the 7-bit post divider (N). The feedback divider (M) consists of
both a 7-bit integer portion (MINT) and an 18-bit fractional portion
(MFRAC) and provides the means for high-resolution frequency
generation. The output frequency f
OUT
is calculated by:
(1)
f
OUT
f
XTAL
1
PN
------------
MINT
MFRAC 0.5+
2
18
-------------------------------------
+=
Input
SelectsFSEL
0 (default) Frequency 0
1 Frequency 1
Frequency Configuration
An order code is assigned to each frequency configuration and the
VCXO pull-range programmed by the factory (default frequencies).
For more information on the available default frequencies and order
codes, please see the Ordering Information Section in this document.
For available order codes, see the FemtoClock NG
Ceramic-Package XO and VCXO Ordering Product Information
document.
For more information on programming capabilities of the device for
custom frequ
ency and pull-range configurations, see the FemtoClock
NG Ceramic 5x7 Module Programming Guide.
Table 3A. Frequency Selection
IDT8N3DV85CCD REVISION A OCTOBER 30, 2013 5 ©2013 Integrated Device Technology, Inc.
IDT8N3DV85 Data Sheet LVPECL DUAL-FREQUENCY PROGRAMMABLE VCXO
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Supply Voltage, V
CC
3.71V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, I
O
Continuous Current
Surge Current
50mA
100mA
Package Thermal Impedance,
JA
49.4C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
DC Electrical Characteristics
NOTE 1: Outputs terminated with 50 to V
CC
– 2V.
NOTE 1: Outputs terminated with 50 to V
CC
– 2V.
Item Rating
Table 4A. Power Supply DC Characteristics, V
CC
=
3.3V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Power Supply Voltage 3.135 3.3 3.465 V
I
EE
Power Supply Current 130 160 mA
Table 4B. Power Supply DC Characteristics, V
CC
=
2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Power Supply Voltage 2.375 2.5 2.625 V
I
EE
Power Supply Current 120 155 mA
Table 4C. LVPECL DC Characteristics, V
CC
= 3.3V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
– 1.4 V
CC
– 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
– 2.0 V
CC
– 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V
Table 4D. LVPECL DC Characteristics, V
CC
= 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
– 1.4 V
CC
– 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
– 2.0 V
CC
– 1.5 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.4 1.0 V
Table 4E. LVCMOS/LVTTL DC Characteristic, V
CC
= 3.3V ± 5% or 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
V
CC
= 3.3V 2 V
CC
+ 0.3 V
V
CC
= 2.5V 1.7 V
CC
+ 0.3 V
V
IL
Input Low Voltage
V
CC
= V
IN
= 3.465V -0.3 0.7 V
V
CC
= V
IN
= 2.5V -0.3 0.7 V
I
IH
Input High Current FSEL V
CC
= V
IN
= 3.465V or 2.625V 150 µA
I
IL
Input Low Current FSEL V
CC
= 3.465V or 2.625V, V
IN
= 0V -5 µA
IDT8N3DV85CCD REVISION A OCTOBER 30, 2013 6 ©2013 Integrated Device Technology, Inc.
IDT8N3DV85 Data Sheet LVPECL DUAL-FREQUENCY PROGRAMMABLE VCXO
Symbol Parameter
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

8N3DV85FC-0007CDI8

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Programmable Oscillators PROGRAMMABLE FEMTOCLOCK
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