C8051F00x/01x-DK
4 Rev. 0.6
5. Example Source Code
Example source code and register definition files are provided in the “SiLabs\MCU\Examples\
C8051F0xx
” directory
during IDE installation. These files may be used as a template for code development. Example applications include
a blinking LED example which configures the green LED on the target board to blink at a fixed rate.
5.1. Register Definition Files
Register definition files C8051F000.inc and C8051F000.h define all SFR registers and bit-addressable
control/status bits for the C8051F00x/01x device family. They are installed into the
SiLabs\MCU\Examples\C8051F0xx” directory during IDE installation. The register and bit names are identical to
those used in the C8051F00x/01x data sheet. Both register definition files are also installed in the default search
path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051 tools included with the
development kit (A51, C51), it is not necessary to copy a register definition file to each project’s file directory.
5.2. Blinking LED Example
The example source files blink.asm and blinky.c show examples of several basic C8051F00x/01x functions. These
include; disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and linked this pro-
gram flashes the green LED on the target board about five times a second using the interrupt handler with a timer.
C8051F00x/01x-DK
Rev. 0.6 5
6. Target Board
The C8051F00x/01x Development Kit includes a target board with a C8051F005 device pre-installed for evaluation
and preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyp-
ing using the target board. Refer to
Figure 2
for the locations of the various I/O connectors.
P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
J1 Connects SW2 to port pin P1.7
J2 64-pin I/O connector providing access to all I/O signals
J3 Connects LED D3 to port pin P1.6
J4 JTAG connector for Debug Adapter interface
J6 Analog I/O configuration connector
X1 Analog I/O terminal block
Figure 2. C8051F005 Target Board
J3
J1
P1
Proto AreaProto Area
J
2
Pin 1
Prototyping Area I/O Connection Points
J
6
Pin 2
P1.7 RESET
PWRP1.6
Pin 1
JTAG
C8051F005
Pin 1
Pin 2
X1
C8051F00x/01x-DK
6 Rev. 0.6
6.1. System Clock Sources
The C8051F005 device installed on the target board features a internal oscillator which is enabled as the system
clock source on reset. After reset, the internal oscillator operates at a frequency of 2 MHz (±2%) by default but may
be configured by software to operate at other frequencies. Therefore, in many applications an external oscillator is
not required. However, an external crystal may be installed on the target board for additional applications. The tar-
get board is designed to facilitate the installation of an external crystal at the pads marked Q1. Refer to the
C8051F005 datasheet for more information on configuring the system clock source. Following are a few part num-
bers of suitable crystals:
Freq (MHz)
Digikey P/N ECS P/N
18.432 X146-ND ECS-184-20-1 (20 pF loading capacitance)
11.0592 X089-ND ECS-110.5-20-1 (20 pF loading capacitance)
6.2. Switches and LEDs
Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F005
device on the target board. Pressing SW1 puts the device into its hardware-reset state. The device will leave the
reset state after SW1 is released. Switch SW2 is connected to the device’s general purpose I/O (GPIO) pin through
headers. Pressing SW2 generates a logic low signal on the port pin. Remove the shorting block from the header to
disconnect SW2 from the port pins. The port pin signal is also routed to a pin on the J2 I/O connector. See Table 1
for the port pins and headers corresponding to each switch.
Two LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power connection
to the target board. The green LED labeled with a port pin name is connected to the device’s GPIO pin through a
header. Remove the shorting block from the header to disconnect the LED from the port pin. The port pin signal is
also routed to a pin on the J2 I/O connector. See Table 1 for the port pins and headers corresponding to each LED.
6.3. Target Board JTAG Interface (J4)
The
JTAG
connector (J4) provides access to the
JTAG
pins of the C8051F005. It is used to connect the Serial
Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming. Table 2
shows the
JTAG
pin definitions.
Table 1. Target Board I/O Descriptions
Description I/O Header
SW1 Reset none
SW2 P3.7 J1
Green LED P1.6 J3
Red LED PWR none
Table 2. JTAG Connector Pin Descriptions
Pin # Description
1 +3VD (+3.3VDC)
2, 3, 9 GND (Ground)
4TCK
5TMS
6TDO
7TDI
8, 10 Not Connected

C8051F005DK

Mfr. #:
Manufacturer:
Silicon Labs
Description:
C8051F0XX EVAL BRD
Lifecycle:
New from this manufacturer.
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