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841654AGILF
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
REVISION A 4/20/15
841654 D
A
T
A SHEET
13
FEMT
OCLOCKS™ CR
YST
AL-TO-HCSL
CLOCK GENERA
TOR
3.
Calculations and Equations.
The pur
pose of this section is to calculate po
wer dissipation on the IC per HCSL output pair
.
HCSL output driver circuit and termination are shown in
Figure 4.
HCSL is a current steering output which sources a maximum of 17mA of current per output.
T
o calculate worst case on-chip power
dissipation, use the f
ollowing equations which assume a 50
Ω
load to ground.
The highest power dissipation occurs when
V
DD
is HIGH.
P
ower =
(V
DD_HIGH
–
V
OUT
) * I
OUT
,
since V
OUT
= I
OUT
* R
L
= (V
DD_HIGH
– I
OUT
*
R
L
) * I
OUT
= (3.465V – 17mA * 50
Ω
) * 17mA
T
otal P
ower Dissipation per output pair =
50.06mW
F
IGURE
4.
HCSL D
RIVER
C
IRCUIT
AND
T
ERMINA
TION
V
DD
V
OUT
R
L
50
IC
I
OUT
= 17mA
R
REF
=
475
± 1%
FEMT
OCLOCKS™ CRYST
AL-TO-HCSL
CLOCK GENERA
TOR
841654 D
A
T
A SHEET
14
REVISION A 4/20/15
R
ECOMMENDED
T
ERMINA
TION
Figure 5A
is the recommended termination for applications which
require the receiver and driv
er to be on a separate PCB.
All tr
aces
should be 50
Ω
impedance.
F
IGURE
5A.
R
ECOMMENDED
T
ERMINA
TION
Figure 5B
is the recommended termination for applications which
require a point to point connection and contain the driver and
receiver on the same PCB
.
All traces should all be 50
Ω
impedance.
F
IGURE
5B.
R
ECOMMENDED
T
ERMINA
TION
REVISION A 4/20/15
841654 D
A
T
A SHEET
15
FEMT
OCLOCKS™ CR
YST
AL-TO-HCSL
CLOCK GENERA
TOR
R
ELIABILITY
I
NFORMA
TION
T
RANSIST
OR
C
OUNT
The transistor count f
or 841654 is:
2954
T
ABLE
8.
θ
JA
VS
. A
IR
F
LO
W
T
ABLE
FOR
28 L
EAD
TSSOP
θ
JA
by
V
elocity (Meters per Second)
0 1
2.5
Multi-La
yer PCB, JEDEC Standard
T
est Boards
64.5°C/W
60.4°C/W
58.5°C/W
P
A
CKAGE
O
UTLINE
- G S
UFFIX
FOR
28 L
EAD
TSSOP
T
ABLE
9.
P
ACKA
GE
D
IMENSIONS
Reference Document:
JEDEC Pub
lication 95, MO-153
SYMBOL
Millimeters
Minimum
Maxim
um
N2
8
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
9.60
9.80
E
8.10 BASIC
E1
6.00
6.20
e
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
P
A
CKA
GE
O
UTLINE
AND
P
A
CKA
GE
D
IMENSIONS
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
841654AGILF
Mfr. #:
Buy 841654AGILF
Manufacturer:
IDT
Description:
Clock Generators & Support Products 4 HCSL OUT SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
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EMS
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