W78C438C
Publication Release Date: March 10, 2010
- 7 - Revision A7
(A) EPMA.7 = 0
W78C438
EPROM
RAM
AP5
PSEN
ADDR 1MB
(20-bit)
ADDR (20-bit)
DATA
AP6
DP4
WR
RD
P3
OE
WE
OE
AP7
P1
P0
P2
P8
INT1
INT3
INT0
INT2
\ 8
\ 4
\ 8
\ 8
64K PROGRAM
DATA AREA
When bit 7 of the EPMA is "1," AP7<3:0> are the output pins that support memory-mapped peripheral
chip select logic, which eliminates the need for glue logic. These pins are decoded by AP6<7:6>. Only
one pin is active low at any time. That is, they are active individually with 16K address resolution. For
example, CS0 is active low in the address range from 0000H to 3FFFH, CS1 is active low in the
address range from 4000H to 7FFFH, and so forth.
(B) EPMA.7 = 1
W78C438
AP5
PSEN
AP6
DP4
WR
RD
P3
P1
P0
P2
P8
INT1
INT3
INT0
INT2
RAM
ADDR (14-bit)
DATA
WE
OE
AP7.0
AP7.1
AP7.2
AP7.3
0000h
3FFFh
4000h
7FFFh
8000h
BFFFh
C000h
FFFFh
\ 8
\ 8
\ 6
\ 8
\ 8
Device
Device
Device
(16k)
(16k)
(16k)
(16k)
EPROM
OE
64K PROGRAM
DATA AREA
ADDR (16-bit)
W78C438C
- 8 -
The EPMA register is a nonstandard 8-bit SFR at address 0A2H in the standard W78C32. To
read/write the EPMA register, one can use the "MOV direct" instruction or "read-modify-write"
instructions. Bits <6:4> of the EPMA register are reserved bits, and their output values are 111B if they
are read. The content of EPMA is 70H after a reset. The EPMA register does not support bit-
addressable instructions.
BIT NAME FUNCTION
7 EPMA7
EPMA7 = 0: 64 KB program/1 MB data memory space mode
EPMA7 = 1: memory-mapped chip select mode
6 EPMA6 Reserved
5 EPMA5 Reserved
4 EPMA4 Reserved
3 EPMA3 Value of AP7.3
2 EPMA2 Value of AP7.2
1 EPMA1 Value of AP7.1
0 EPMA0 Value of AP7.0
Table 1. Functional Description of EPMA Register
5.2 Additional I/O Port
The W78C438C provides one parallel I/O port, Port 8. Its function is the same as that of Port 1 in the
W78C31, except that it is mapped by the P8 register and is not bit-addressable. The P8 register is not
a standard register in the standard W78C32. Its address is at 0A6H. To read/write the P8 register, one
can use the "MOV direct" instruction or "read-modify-write" instructions.
[Example]: MOV 0A6H, A ; Output data via Port 8.
MOV A, 0A6H ; Input data via Port 8.
5.3 Additional External Interrupt
The W78C438C provides two additional external interrupts,
INT2
and
INT3
, whose functions are
similar to those of external interrupts 0 and 1 in the W78C32. The functions (or the status) of these
interrupts are determined by (or shown by) the bits in the XICON (External Interrupt Control) register.
For details, see Table 2. The XICON register is bit-addressable but is not a standard register in the
standard 80C32. Its address is at 0C0H. To set/clear the bit of the XICON register, one can use the
"SETB(
CLR
) bit" instruction. For example, "SETB 0C2H" sets the EX2 bit of XICON. The interrupt
vector addresses and the priority polling sequence within the same level are shown in Table 3.
[Example].
SETB 0C0H ;
INT2
is falling-edge triggered.
SETB 0C3H ;
INT2
is high-priority.
SETB 0C2H ; Enable
INT2
.
CLR 0C4H ;
INT3
is low-level triggered.
W78C438C
Publication Release Date: March 10, 2010
- 9 - Revision A7
BIT ADDR. NAME FUNCTION
7 0C7H PX3
High/low priority level for
INT3
is specified when this bit is set/cleared by
software.
6 0C6H EX3
Enable/disable interrupt from
INT3
when this bit is set/cleared by software.
5 0C5H IE3
If IT3 is "1," IE3 is set/cleared automatically by hardware when interrupt is
detected/serviced.
4 0C4H IT3
INT3
is falling-edge/low-level triggered when this bit is set/cleared by
software.
3 0C3H PX2
High/low priority level for
INT2
is specified when this bit is set/cleared by software.
2 0C2H EX2
Enable/disable interrupt from
INT2
when this bit is set/cleared by software.
1 0C1H IE2
If IT2 is "1," IE2 is set/cleared automatically by hardware when interrupt is
detected/serviced.
0 0C0H IT2
INT2
is falling-edge/low-level triggered when this bit is set/cleared by
software.
Table 2. Functions of XICON Register
INTERRUPT SOURCE VECTOR ADDRESS PRIORITY SEQUENCE
External Interrupt 0 03H 0 (Highest)
Timer/Counter 0 0BH 1
External Interrupt 1 13H 2
Timer/Counter 1 1BH 3
Serial Port 23H 4
Timer/Counter 2 2BH 5
External Interrupt 2 33H 6
External Interrupt 3 3BH 7 (Lowest)
Table 3. Priority of Interrupts

W78C438C40FL

Mfr. #:
Manufacturer:
Description:
IC MCU 8BIT ROMLESS 100QFP
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New from this manufacturer.
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