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74AUP2T1326GF,115

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
74AUP2T1326 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 3 July 2012 6 of 17
NXP Semiconductors
74AUP2T1326
Low-power dual supply buffer/line driver; 3-state
[1] V
CCI
is the supply voltage associated with the input pin.
[2] V
CCO
is the supply voltage associated with the output pin.
[3] For V
CCI
values not specified in the data sheet: minimum V
IH
= 0.7 V
CCI
and maximum V
IL
= 0.3 V
CCI
.
[4] To show I
CC
remains very low when the input-disable feature is enabled.
I
OFF
additional
power-off
leakage
current
1Y; V
CC(A)
=0Vto0.2V;
V
O
=0Vto2.7V;
V
CC(B)
=1.65Vto2.7V
--0.2 - 0.6 A
A, 2Y, 3Y;
V
CC(B)
=0Vto0.2V;
V
I
or V
O
= 0 V to 2.7 V;
V
CC(A)
=1.65Vto2.7V
--0.2 - 0.6 A
I
CC(A)
supply
current A
V
I
= 0 V or V
CC(A)
; I
O
=0A
[1]
V
CC(A)
= 1.65 V to 2.7 V;
V
CC(B)
=0Vto2.7V
--0.5 - 0.9A
I
CC(B)
supply
current B
V
I
= 0 V or V
CC(B)
; I
O
=0A
[1]
V
CC(A)
= V
CC(B)
= 1.65 V to
2.7 V;
--0.5 - 0.9A
V
CC(A)
= 1.71 V; V
CC(B)
= 2.6 V - - 500 - 750 A
I
CC
additional
supply
current
nOE; V
CC(A)
=V
CC(B)
=2.7V;
V
I
=V
CC(A)
0.6 V
--40 - 50A
A; V
CC(A)
=V
CC(B)
=2.7V;
V
I
=V
CC(B)
0.6 V;
- - 80 - 100 A
A; V
I
= GND to 2.7 V;
nOE = GND;
V
CC(A)
=1.65Vto2.7V;
V
CC(B)
=1.65Vto2.7V
[4]
--2 - 2A
R
pd
pull-down
resistance
145 200 255 140 260 k
C
I
input
capacitance
input A; V
I
=0VorV
CCI
;
V
CCI
=1.65Vto2.7V
[1]
-0.9- - -pF
input nOE; V
I
=0VorV
CCI
;
V
CCI
=1.65Vto2.7V
[1]
-0.8- - -pF
C
O
output
capacitance
1Y; V
O
= GND; V
CCO
= 0 V
[2]
-1.7-- -pF
2Y, 3Y enabled; V
O
= GND;
V
CCO
=0 V
[2]
-1.7-- -pF
2Y, 3Y disabled;
V
CCO
=0Vto2.7V;
V
O
=GNDor V
CCO
[2]
-1.5-- -pF
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ Max Min Max
74AUP2T1326 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 3 July 2012 7 of 17
NXP Semiconductors
74AUP2T1326
Low-power dual supply buffer/line driver; 3-state
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5.
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ
[1]
Max Min Max
C
L
= 5 pF
t
pd
propagation delay A to 2Y, 3Y; see Figure 3
[2]
V
CC(B)
= 1.65 V to 1.95 V 1.9 3.2 4.5 1.7 5.0 ns
V
CC(B)
= 2.3 V to 2.7 V 1.5 2.6 3.4 1.3 3.8 ns
nOE to 1Y; see Figure 3
V
CC(A)
= 1.65 V to 1.95 V 2.4 4.0 5.4 2.2 6.0 ns
V
CC(A)
= 2.3 V to 2.7 V 2.2 3.2 3.9 2.0 4.3 ns
C
L
= 10 pF
t
pd
propagation delay A to 2Y, 3Y; see Figure 3
[2]
V
CC(B)
= 1.65 V to 1.95 V 2.3 3.8 5.3 2.0 5.8 ns
V
CC(B)
= 2.3 V to 2.7 V 1.8 3.2 4.1 1.5 4.5 ns
nOE to 1Y; see Figure 3
V
CC(A)
= 1.65 V to 1.95 V 2.9 4.6 6.1 2.5 6.7 ns
V
CC(A)
= 2.3 V to 2.7 V 2.5 3.7 4.6 2.2 5.0 ns
C
L
= 5 pF; V
CC(A)
= 1.65 V to 1.95 V
t
en
enable time nOE to 2Y, 3Y; see Figure 4
[3]
V
CC(B)
= 1.65 V to 1.95 V 2.4 4.4 9.7 2.1 10.1 ns
V
CC(B)
= 2.3 V to 2.7 V 2.2 3.9 8.2 1.9 8.8 ns
t
dis
disable time nOE to 2Y, 3Y; see Figure 4
[4]
V
CC(B)
= 1.65 V to 1.95 V 2.4 4.5 8.9 2.1 9.4 ns
V
CC(B)
= 2.3 V to 2.7 V 2.2 3.8 7.8 1.9 8.4 ns
C
L
= 5 pF; V
CC(A)
= 2.3 V to 2.7 V
t
en
enable time nOE to 2Y, 3Y; see Figure 4
[3]
V
CC(B)
= 1.65 V to 1.95 V 2.4 4.0 8.7 2.1 9.0 ns
V
CC(B)
= 2.3 V to 2.7 V 2.2 3.4 7.2 1.9 7.7 ns
t
dis
disable time nOE to 2Y, 3Y; see Figure 4
[4]
V
CC(B)
= 1.65 V to 1.95 V 2.4 4.2 7.9 2.1 8.3 ns
V
CC(B)
= 2.3 V to 2.7 V 2.2 3.5 6.8 1.9 7.3 ns
C
L
= 10 pF; V
CC(A)
= 1.65 V to 1.95 V
t
en
enable time nOE to 2Y, 3Y; see Figure 4
[3]
V
CC(B)
= 1.65 V to 1.95 V 2.9 4.9 11.0 2.5 11.7 ns
V
CC(B)
= 2.3 V to 2.7 V 2.5 4.4 9.7 2.2 10.5 ns
t
dis
disable time nOE to 2Y, 3Y; see Figure 4
[4]
V
CC(B)
= 1.65 V to 1.95 V 2.9 5.6 10.8 2.5 11.5 ns
V
CC(B)
= 2.3 V to 2.7 V 2.5 4.6 9.5 2.2 10.1 ns
74AUP2T1326 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 3 July 2012 8 of 17
NXP Semiconductors
74AUP2T1326
Low-power dual supply buffer/line driver; 3-state
[1] All typical values are measured at nominal V
CC(A)
and V
CC(B)
.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] t
en
is the same as t
PZH
and t
PZL
.
[4] t
dis
is the same as t
PHZ
and t
PLZ
.
[5] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
C
L
= 10 pF; V
CC(A)
= 2.3V to 2.7V
t
en
enable time nOE to 2Y, 3Y; see Figure 4
[3]
V
CC(B)
= 1.65 V to 1.95 V 2.9 4.5 10.0 2.5 10.5 ns
V
CC(B)
= 2.3 V to 2.7 V 2.5 3.9 8.7 2.2 9.3 ns
t
dis
disable time nOE to 2Y, 3Y; see Figure 4
[4]
V
CC(B)
= 1.65 V to 1.95 V 2.9 5.3 9.8 2.5 10.3 ns
V
CC(B)
= 2.3 V to 2.7 V 2.5 4.3 8.4 2.2 8.9 ns
C
L
= 5 pF and 10 pF
C
PD
power dissipation
capacitance
per active output;
output 2Y, 3Y; f
i
= 1 MHz;
V
I
=0Vto V
CC
[5]
V
CC(A)
= V
CC(B)
= 1.8 V - 3.0 - - - pF
V
CC(A)
= V
CC(B)
= 2.5 V - 3.6 - - - pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5.
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ
[1]
Max Min Max
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

74AUP2T1326GF,115

Mfr. #:
Buy 74AUP2T1326GF,115
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers 5ns 2.7V 250mW
Lifecycle:
New from this manufacturer.
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