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NCP167AMX330TBG

P1-P3P4-P6P7-P9P10-P12
© Semiconductor Components Industries, LLC, 2016
August, 2018 − Rev. 3
1 Publication Order Number:
NCP167/D
NCP167
700 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
The NCP167 is a linear regulator capable of supplying 700 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCP167 device provides low noise, high PSRR, low
quiescent current, and very good load/line transients. The device is
designed to work with a 1 mF input and a 1 mF output ceramic capacitor.
It is available in two thickness ultra−small 0.35P, 0.65 mm x 0.65 mm
Chip Scale Package (CSP) and XDFN4 0.65P, 1 mm x 1 mm.
Features
• Operating Input Voltage Range: 1.9 V to 5.5 V
• Available in Fixed Voltage Option: 1.8 V to 5.2 V
• ±2% Accuracy Over Load/Temperature
• Ultra Low Quiescent Current Typ. 12 mA
• Standby Current: Typ. 0.1 mA
• Very Low Dropout: 210 mV at 700 mA
• Ultra High PSRR: Typ. 85 dB at 20 mA, f = 1 kHz
• Ultra Low Noise: 8.5 mV
RMS
• Stable with a 1 mF Small Case Size Ceramic Capacitors
• Available in −WLCSP4 0.65 mm x 0.65 mm x 0.33 mm
−XDFN4 1 mm x 1 mm x 0.4 mm
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Battery−powered Equipment
• Wireless LAN Devices
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
IN
EN
GND
OUT
OFF
ON
Figure 1. Typical Application Schematics
V
OUT
C
OUT
1 mF
Ceramic
V
IN
NCP167
C
IN
1 mF
Ceramic
www.onsemi.com
See detailed ordering and shipping information on page 10 o
f
this data sheet.
ORDERING INFORMATION
PIN CONNECTIONS
A1
A2
B1 B2
IN OUT
EN GND
(Top View)
(Top View)
MARKING
DIAGRAMS
X or XX = Specific Device Code
M = Date Code
XDFN4
CASE 711AJ
WLCSP4
CASE 567JZ
A1
1
XX M
1
X
M
NCP167
www.onsemi.com
2
Figure 2. Simplified Schematic Block Diagram
IN
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
INTEGRATED
SOFT−START
BANDGAP
REFERENCE
ENABLE
LOGIC
EN
OUT
GND
EN
* ACTIVE DISCHARGE
Version A only
PIN FUNCTION DESCRIPTION
Pin No.
CSP4
Pin No.
XDFN4
Pin
Name
Description
A1 4 IN Input voltage supply pin
A2 1 OUT
Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
B1 3 EN Chip enable: Applying V
EN
< 0.4 V disables the regulator, Pulling V
EN
> 1.2 V enables the LDO.
B2 2 GND Common ground connection
− EPAD EPAD Expose pad should be tied to ground plane for better power dissipation
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) V
IN
−0.3 V to 6
V
Output Voltage V
OUT
−0.3 to V
IN
+ 0.3, max. 6 V V
Chip Enable Input V
CE
−0.3 to V
IN
+ 0.3, max. 6 V V
Output Short Circuit Duration t
SC
unlimited s
Maximum Junction Temperature T
J
150 °C
Storage Temperature T
STG
−55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESD
HBM
2000 V
ESD Capability, Machine Model (Note 2) ESD
MM
200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, WLCSP4 (Note 3)
Thermal Resistance, Junction−to−Air
R
q
JA
108
°C/W
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air
198
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
NCP167
www.onsemi.com
3
ELECTRICAL CHARACTERISTICS −40°C ≤ T
J
≤ 125°C; V
IN
= V
OUT(NOM)
+ 1 V; I
OUT
= 1 mA, C
IN
= C
OUT
= 1 mF, unless otherwise
noted. V
EN
= 1.2 V. Typical values are at T
J
= +25°C (Note 4).
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage V
IN
1.9 5.5 V
Output Voltage Accuracy (Note 5) V
IN
= V
OUT(NOM)
+ 1 V to 5.5 V
0 mA ≤ I
OUT
≤ 700 mA
V
OUT
−2 +2 %
Line Regulation V
OUT(NOM)
+ 1 V ≤ V
IN
≤ 5.5 V Line
Reg
0.02 %/V
Load Regulation I
OUT
= 1 mA to
700 mA
WLCSP4
Load
Reg
0.001
%/mA
XDFN4 0.002
Dropout Voltage (Note 6) I
OUT
= 700 mA
V
OUT(NOM)
= 1.8 V
V
DO
315 450
mV
V
OUT(NOM)
= 3.3 V 190 290
Output Current Limit V
OUT
= 90% V
OUT(NOM)
I
CL
800 1000
mA
Short Circuit Current V
OUT
= 0 V I
SC
1050
Quiescent Current I
OUT
= 0 mA I
Q
9.7 18
mA
Shutdown Current V
EN
≤ 0.4 V, V
IN
= 4.8 V I
DIS
0.01 1
mA
EN Pin Threshold Voltage
EN Input Voltage “H” V
ENH
1.2
V
EN Input Voltage “L” V
ENL
0.4
EN Pull Down Current V
EN
= 4.8 V I
EN
0.2 0.5
mA
Turn−On Time
C
OUT
= 1 mF, From assertion of V
EN
to
V
OUT
= 95% V
OUT(NOM)
120
ms
Power Supply Rejection Ratio V
OUT(NOM)
= 3.3 V,
I
OUT
= 20 mA
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
PSRR
83
85
80
63
dB
Output Voltage Noise f = 10 Hz to 100 kHz I
OUT
= 20 mA V
N
8.5
mV
RMS
Thermal Shutdown Threshold
Temperature rising T
SDH
160 °C
Temperature falling T
SDL
140 °C
Active output discharge resistance V
EN
< 0.4 V, Version A only R
DIS
280
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T
A
= 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Respect SOA.
6. Dropout voltage is characterized when V
OUT
falls 100 mV below V
OUT(NOM)
.
P1-P3P4-P6P7-P9P10-P12

NCP167AMX330TBG

Mfr. #:
Buy NCP167AMX330TBG
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators LDO 700 MA ULTRA-LOW NOISE 3.3V
Lifecycle:
New from this manufacturer.
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