MAX3670
Low-Jitter 155MHz/622MHz
Clock Generator
6 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 C2+
Positive Filter Input. External capacitor connected between C2+ and C2- used for setting the higher-
order pole frequency (see Setting the Higher-Order Poles).
2 C2-
Negative Filter Input. External capacitor connected between C2+ and C2- used for setting the higher-
order pole frequency (see Setting the Higher-Order Poles).
3, 9, 15 VCCD Positive Digital Supply Voltage
4 THADJ Threshold Adjust Input. Used to adjust the Loss-of-Lock threshold (see
LOL
Setup).
5 CTH
Threshold Capacitor Input. A capacitor connected between CTH and ground used to control the Loss-
of-Lock conditions (see
LOL
Setup).
6 GSEL1
Gain Select 1 Input. Three-level pin used to set the phase-detector gain (K
PD
) and the frequency-
divider ratio (N
2
) (see Table 3).
7 GSEL2
Gain Select 2 Input. Three-level pin used to set the phase-detector gain (K
PD
) and the frequency-
divider ratio (N
2
) (see Table 3).
8 GSEL3
Gain Select 3 Input. Three-level pin used to set the phase-detector gain (K
PD
) and the frequency-
divider ratio (N
2
) (see Table 3).
10 LOL
Loss-of-Lock. LOL signals a TTL low when the reference frequency differs from the VCO frequency.
LOL signals a TTL high when the reference frequency equals the VCO frequency.
11 GND Supply Ground
12 RSEL
Reference Clock Select Input. Three-level pin used to set the predivider ratio (N
3
) for the input
reference clock (see Table 1).
13
REFCLK
Positive Reference Clock Input
14 REFCLK- Negative Reference Clock Input
16 VSEL
VCO Clock Select Input. Three-level pin used to set the predivider ratio (N
1
) for the input VCO clock
(see Table 2).
17 POUT- Negative Optional Clock Output, PECL
18 POUT+ Positive Optional Clock Output, PECL
19, 22 VCCO Positive Supply Voltage for PECL Outputs
20 MOUT- Negative Main Clock Output, PECL
21 MOUT+ Positive Main Clock Output, PECL
23 VCOIN- Negative VCO Clock Input
24 VCOIN+ Positive VCO Clock Input
25 VC Control Voltage Output. The voltage output from the op amp that controls the VCO.
26 POLAR
Polarity Control Input. Polarity control of op amp input. POLAR = GND for VCOs with positive gain
transfer. POLAR = V
CC
for VCOs with negative gain transfer.
27 PSEL1 Optional Clock Select 1 Input. Used to set the divider ratio for the optional clock output (see Table 4).
28 PSEL2 Optional Clock Select 2 Input. Used to set the divider ratio for the optional clock output (see Table 4).
29 VCCA Positive Analog Supply Voltage for the Charge Pump and Op Amp
30 COMP
Compensation Control Input. Op amp compensation reference control input. COMP = GND for VCOs
whose control pin is V
CC
referenced. COMP = V
CC
for VCOs whose control pin is GND referenced.
31 OPAMP- Negative Op Amp Input (POLAR = 0), Positive Op Amp Input (POLAR = 1)
32 OPAMP+ Positive Op Amp Input (POLAR = 0), Negative Op Amp Input (POLAR = 1)
— EP
Exposed Pad. The exposed pad must be soldered to the circuit board ground plane for proper thermal
and electrical performance.
