LT8584
13
8584fb
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operaTion
SWITCH PROTECTION
Several protection features are included to reduce the
likelihood of permanent damage to the internal power
NPN switch: the short-circuit detector, the high-impedance
detector, the switch overvoltage protection (OVP), and
internal undervoltage lockout (UVLO). These also alert
the user when the integrity of the discharge converter
has been compromised because of a fault. Switching is
disabled during fault conditions.
Short-Circuit Detector
The short-circuit detector detects when the power NPN
switch turns off prematurely due to a short in the primary-
side winding. If the current comparator trips before the
850ns short detection timeout, the switch error latch will
trip. The OUT pin is driven to V
VIN
– 1.2V, V
SW,ERR
, during
a switch error. The part must be reset to clear the switch
error fault.
High-Impedance Detector
The high-impedance detector monitors how long the power
NPN switch has been on. If the switch remains on longer
than 50µs, the switch maximum on-time, the switch error
latch is set and the OUT pin is driven to V
VIN
– 1.2V, V
SW,ERR
.
The part must be reset to clear the switch error fault.
Overvoltage Protection (OVP)
The OVP circuitry dynamically clamps the NPN collector’s
SW
pins to 50V. This protects the internal power switch
from entering breakdown and causing permanent dam
-
age. The clamp is also used as a primary-side snubber to
absorb the leakage inductance energy. The 200ns switch
clamp blanking time determines if the clamp is absorbing
a leakage spike or if the switch is turning off while the
secondary of the transformer is open. If the switch clamp
is on longer than approximately 200ns, the switch error
latch is set. The part must be reset to clear the switch
error fault.
Internal Undervoltage Lockout (UVLO)
LT8584 protects itself during a UVLO condition by disabling
switching. The OUT pin is driven to V
VIN
– 1.4V, V
FAULT
,
during a UVLO condition. A UVLO fault is non-latching and
dominates over a switch fault (Serial Mode requires V
IN
to remain above 2V for a UVLO fault to be non-latching).
Once the UVLO condition is cleared, the OUT pin reverts
to normal operation and switching resumes. If the switch
fault latch was tripped prior to the UVLO event, the OUT pin
will indicate a switch fault, V
SW,ERR
, only after the UVLO
condition is cleared and switching would remain disabled.
Figure 2. Simple Mode Configurations
LT8584
LOCAL
IC GND
LOCAL
IC GND
LOCAL
IC GND
LOCAL
IC GND
STACK+
STACK–
V
SNS
V
CELL
GND RTMR
SW
D
IN
V
IN
MODE
DCHRG
OUT
ACTIVE LOW
8584 F02
ONOFF
LT8584
STACK+
STACK–
V
SNS
V
CELL
GND RTMR
SW
D
IN
V
IN
MODE
DCHRG
OUT
ACTIVE HIGH
ONOFF
LT8584
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operaTion
SIMPLE MODE OPERATION
Connecting the MODE pin to the V
IN
pin configures the
LT8584 as a simple discharger with a simple on/off
shutdown pin. Tw o shutdown options are provided to
handle either an active high (DCHRG) or an active low
input (D
IN
), see Figure 2. Connect D
IN
to ground and use
DCHRG pin for an active high input, or connect DCHRG to
V
IN
and use D
IN
as an active low input. The part will begin
switching once the D
IN
pin is low and DCHRG is high.
Figure 3 shows the enable logic function. Never drive D
IN
more than 0.4V below the local ground while operating
in active-high simple mode.
OUT Pin in Simple Mode
The OUT pin defaults to V
TEMP
, a voltage proportional to
the die temperature, and is measured with respect to the
cell voltage such that V
TEMP
= V
VCELL
V
OUT
. This can be
used to monitor the internal die temperature for system
diagnostics. The OUT pin will also output two distinct in
-
dication voltage levels, V
VIN
– 1.4V, V
FAULT
, for an internal
UVLO condition, or V
VIN
– 1.2V, V
SW,ERR
, for a switch
error. V
TEMP
is not allowed to exceed 1V (equivalent to
180°C)
1
. This makes both the fault and switch error volt-
ages deterministic.
The switch error latch is set when the
power NPN switch has encountered a fault (see the Switch
Protection section for more details).
Figure 4. Serial Communication Decode
Figure 3. Simple Mode Enable Logic
8584 F03
ENABLE
BALANCING
DCHRG
DIN
8584 F04
SHUTDOWN
SHUTDOWNSERIAL DECODE
ENABLED WITH
CORRECT STATE
DECODE WINDOW
16.3ms
R
RTMR
= 100kΩ
V
CELL
SELECTED
V
CELL
SELECTEDVOLTAGE MODE
HANDSHAKE
ANALOG MUX
ACTIVATED TO DESIRED INPUT
OUT WILL NEVER BE DRIVEN BELOW V
VIN
– 1.435V
OUT PIN CLAMP IS ACTIVE BELOW V
VIN
– 1.53V
D
IN
t
t
t
RTMR
1.22V
OUT
V
VIN
V
VIN
V
VIN
– 1.4V
V
VIN
– 0.2V
V
VIN
– 0.4V
V
VIN
– 0.6V
V
VIN
– 0.8V
1
Not verified during production testing.
LT8584
15
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operaTion
SERIAL MODE OPERATION
Use serial mode if monitoring the discharging current
and/or the die temperature are required. Connecting the
MODE pin to GND enables serial communication. The D
IN
pin is used to input serial data through a custom serial
bus (see Figures 4 and 5).
Serial Mode Safety Features
The LT8584 provides the user with several levels of safety
and verification. The LT8584 has built in switch protec
-
tion that detects and halts power delivery during either
a primary-side open or short, a secondary-side open or
short, or an overvoltage on the primary or secondary. The
LT8584 outputs the V
SW,ERR
handshake that can be read
back by the battery stack monitor (BSM).
The LT8584 also detects communication errors including
too many or too few D
IN
pulses or a UVLO condition. The
LT8584 outputs the V
FAULT
handshake that can be read
back by the BSM.
The LT8584 also provides critical cell parameters including
temperature, discharge current, cell voltage, and cell and
connection DC resistance. These are all read back by the
BSM. As the cell starts to age, the cell impedance increases.
This allows the user to perform preventative maintenance,
keeping the system down time
to a minimum.
Finally,
the LT8584 handshake voltages are ±3% accurate
independent references that can be used to verify that every
channel in the BSM is measuring accurately.
Serial Architecture
Power to the part is latched on the first negative edge
of D
IN
signal and remains latched for the duration of the
decode window, t
W
. This allows the D
IN
pin to be toggled
for communicating serial data without resetting the part.
The LT8584 counts the number of negative edges seen
on the D
IN
pin. Note that the first edge, which initiates se-
rial communication
and latches the part, is not counted.
There are four active modes the user can select as shown
in Table 1. Handshaking is accomplished by reading the
analog voltage on the OUT pin. Handshaking voltages
are asserted on the negative edge of the D
IN
signal, cor-
responding to the serial decode count.
Once
the decode window expires and RTMR pin returns
to ground, three actions are initiated: the OUT pin analog
multiplexer switches to the desired measurement, the dis
-
charger turns
on depending on selected mode in Table 1,
and the input power latch disables. Note that the LT8584
can
only be disabled after the decode window has expired
and the D
IN
pin has been taken high.
Table 1.Serial Mode States
PULSE
COUNT MODE
DISCHARGER
ST
ATE
MUX
OUTPUT
HANDSHAKE
VOLTAGE
(V
VIN
– V
OUT
)
Part Disabled 0 Disabled V
CELL
N/A
0 Fault Disabled V
FAULT
1.4
1 1 Enabled V
CELL
0.2
2 2 Enabled V
SNS
0.4
3 3 Enabled V
TEMP
0.6
4 4 Disabled V
TEMP
0.8
≥5 Fault Disabled V
FAULT
1.4
Figure 5. Serial Communication Architecture
8584 F05
2-BIT
RIPPLE
COUNTER
Y0
Y1
POR
RST
Q
Q
S
R
MODE 1
MODE 2
MODE 3
MODE 4
POR
Q
Q
S
R
1-SHOT
11-BIT
RIPPLE
COUNTER
OSCILLATOR
EN
POR
V
DD
POR
DIN
Y0
Y11RST
V
DD
A
B
C
D
2 × 4
DECODER
a
b

LT8584EFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 2.5A Mono Active Cell Balancer w/ Teleme
Lifecycle:
New from this manufacturer.
Delivery:
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