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SC28L194A1A,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P52
Philips Semiconductors Product data sheet
SC28L194Quad UART for 3.3 V and 5 V supply voltage
2006 Aug 15
34
Table 46. Register Map, Data
A(7:0)
UART A
A(7:0)
Read Write
1000 0000 (x80) Mode Register a (MR2a) Mode Register a (MR2a)
1000 0001 (x81) Status Register a (SRa) Command Register a (CRa)
1000 0010 (x82) Interrupt Status Register a (ISRa) Interrupt Mask Register a (IMRa)
1000 0011 (x83) Receiver FIFO Reg a (RxFIFOa) Transmitter FIFO Reg a (TxFIFOa)
1000 0100 (x84) Reserved ♣ BRG Timer Reg Upper a (BRGTRUa)
1000 0100 (x84) Input Port Reg a (IPRa) Reserved
1000 0101 (x85) I/O Port Interrupt and Output a I/OPIORa) I/O Port Interrupt and Output a (I/OPIORa)
1000 0110 (x86) Xon/Xoff Interrupt Status Reg a (XISRa) Reserved
1000 0111 (x87) ♣ GP Out Select Reg (GPOSR) GP Out Select Reg (GPOSR)
1000 1011 (x8B) ♣ GP Out Clk Reg (GPOC) GP Out Clk Reg (GPOC)
1000 1100 (x8C) ♣ Current Interrupt Reg (CIR) ♣ Update CIR
1000 1101 (x8D) Reserved ♣ BRG Timer Reg Upper b (BRGTRUb)
1000 1110 (x8E) ♣ Global Receive FIFO Reg (GRxFIFO) ♣ Global Transmit FIFO Reg (GTxFIFO)
1000 1111 (x8F) ♣ Global Chip Configuration Reg (GCCR) ♣ Global Chip Configuration Reg (GCCR)
A(7:0)
UART B
A(7:0)
Read Write
1001 0000 (x90) Mode Register b (MR2b) Mode Register b (MR2b)
1001 0001 (x91) Status Register b (SRb) Command Register b (CRb)
1001 0010 (x92) Interrupt Status Register b (ISRb) Interrupt Mask Register b (IMRb)
1001 0011 (x93) Receiver FIFO Reg b (RxFIFOb) Transmitter FIFO Reg b (TxFIFOb)
1001 0100 (x94) Reserved ♣ BRG Timer Reg Lower a (BRGTRLa)
1001 0100 (x94) Input Port Reg b (IPRb) Reserved
1001 0101 (x95) I/O Port Interrupt and Output b (I/OPIORb) I/O Port Interrupt and Output b (I/OPIORb)
1001 0110 (x96) Xon/Xoff Interrupt Status Reg b (XISRb) Reserved
1001 0111 (x97) ♣ GP Output Reg (GPOR) ♣ GP Output Reg (GPOR)
1001 1010 (x9A) Reserved Reserved
1001 1011 (x9B) ♣ GP Out Data Reg (GPOD) ♣ GP Out Data Reg (GPOD)
1001 1100 (x9C) Reserved ♣ BRG Timer Control Reg (BRGCTCR)
1001 1100 (x9C) ♣ Global Interrupt Channel Reg (GICR) Reserved
1001 1101 (x9D) Reserved ♣ BRG Timer Reg Lower b (BRGTRLb)
1001 1101 (x9D) ♣ Global Interrupt Byte Count (GIBCR) Reserved
1001 1110 (x9E) Reserved Reserved
1001 1111 (x9F) ♣ Global Interrupt Type Register (GITR) Reserved
Philips Semiconductors Product data sheet
SC28L194Quad UART for 3.3 V and 5 V supply voltage
2006 Aug 15
35
A(7:0)
UART C
A(7:0)
Read Write
1010 0000 (xA0) Mode Register c (MR2c) Mode Register c (MR2c)
1010 0001 (xA1) Status Register c (SRc) Command Register c (CRc)
1010 0010 (xA2) Interrupt Status Register c (ISRc) Interrupt Mask Register c (IMRc)
1010 0011 (xA3) Receiver FIFO Reg c (RxFIFOc) Transmitter FIFO Reg c (TxFIFOc)
1010 0100 (xA4) Input Port Reg c (IPRc) Reserved
1010 0101 (xA5) I/O Port Interrupt and Output c (I/OPIORc) I/O Port Interrupt and Output c (I/OPIORc)
1010 0110 (xA6) Xon/Xoff Interrupt Status Reg c (XISRc) Reserved
1010 0111 (xA7) Reserved Reserved
1010 1000 (xA8) Reserved Reserved
1010 1001 (xA9) Reserved Reserved
1010 1010 (xAA) Reserved Reserved
1010 1011 (xAB) Reserved Reserved
1010 1100 (xAC) Reserved Reserved
1010 1101 (xAD) Reserved Reserved
1010 1110 (xAE) Reserved Reserved
1010 1111 (xAF) Reserved Reserved
A(7:0)
UART D
A(7:0)
Read Write
1011 0000 (xB0) Mode Register d (MR2d) Mode Register d (MR2d)
1011 0001 (xB1) Status Register d (SRd) Command Register d (CRd)
1011 0010 (xB2) Interrupt Status Register d (ISRd) Interrupt Mask Register d (IMRd)
1011 0011 (xB3) Receiver FIFO Reg d (RxFIFOd) Transmitter FIFO Reg d (TxFIFOd)
1011 0100 (xB4) Input Port Reg d (IPRd) Reserved
1011 0101 (xB5) I/O Port Interrupt and Output d (I/OPIORd) I/O Port Interrupt and Output d (I/OPIORd)
1011 0110 (xB6) Xon/Xoff Interrupt Status Reg d (XISRd) Reserved
1011 0111 (xB7) Reserved Reserved
1011 1000 (xBB) Reserved Reserved
1011 1001 (xB9) Reserved Reserved
1011 1010 (xBA) Reserved Reserved
1011 1011 (xBB) Reserved Reserved
1011 1100 (xBC) Reserved Reserved
1011 1101 (xBD) Reserved Reserved
1011 1110 (xBE) Reserved Reserved
1011 1111 (xBF) Reserved Reserved
Philips Semiconductors Product data sheet
SC28L194Quad UART for 3.3 V and 5 V supply voltage
2006 Aug 15
36
RESET CONDITIONS
Device Configuration after Hardware Reset
or CRa cmd=x1F
Cleared registers:
Channel Status Registers (SR)
Channel Interrupt Status Registers (ISR)
Channel Interrupt Mask Registers (IMR)
Channel Interrupt Xon Status Register (XISR)
Interrupt Control Register (ICR)
Global Configuration Control Register (GCCR)
Hence the device enters the asynchronous bus cycling mode.
Current Interrupt Register (CIR)
BRG Timer Run Control Register (BRGTCR)
Watch-dog Timer Run Control Register (WDTRCR)
Channel Input/Output Port Configuration Registers (I/OPCR)
Hence all I/O pins have direction = Input after reset
BRG Counter/Timer Registers
Clears Modes for:
Power down
Test modes
Input Port Changed bits
Gang write to Xon or Xoff
Xon/Xoff/Address detection
Receiver error status
Disables:
Transmitters
Receivers
Interrupts, current and future
Halts:
BRG Counters
Bus cycle in progress (hardware RESET only)
Limitations:
Minimum RESETN pin pulse width is 10 SClk cycles after Vcc
reaches operational range
The user must allow a minimum of 6 SClk cycles to elapse after
a reset (RESETN pin or CRa initiated) of the device terminates
before initiating a new bus cycle.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P52

SC28L194A1A,518

Mfr. #:
Buy SC28L194A1A,518
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC 3V-5V 4CH UART
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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