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STA333SML

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
DocID025317 Rev 2 7/17
STA333SML Electrical specifications
17
3.3 Recommended operating conditions
3.4 Electrical specifications - digital section
Table 5. Recommended operating conditions
Symbol Parameter Min. Typ. Max. Unit
V
CC
Analog supply voltage (VCCx) 4.5 - 18 V
V
DD
Digital supply voltage (VDD_DIG) 3.0 3.3 3.6 V
I
L
Logic input interface 3.0 3.3 3.6 V
T
amb
Ambient temperature 0 - 70 °C
Table 6. Electrical characteristics for digital section
Symbol Parameter Conditions Min. Typ. Max. Unit
I
il
Input current, no pull-up or
pull-down resistor
V
i
= 0 V - - ±10 µA
I
ih
V
i
= V
DD
= 3.6 V - - ±10 µA
V
il
Low-level input voltage - - -
0.2 *
V
DD
V
V
ih
High-level input voltage -
0.8 *
V
DD
--V
V
ol
Low-level output voltage I
ol
= 2 mA - -
0.4 *
V
DD
V
V
oh
High-level output voltage I
oh
= 2 mA
0.8 *
V
DD
--V
I
pu
Pull-up current - 25 66 125 µA
R
pu
Equivalent pull-up
resistance
--50-k
Electrical specifications STA333SML
8/17 DocID025317 Rev 2
3.5 Electrical specifications - power section
The specifications in Table 7 below are given for the conditions V
CC
= 13 V, V
DD
= 3.3 V,
f
SW
= 384 kHz, T
amb
= 25 °C and R
L
= 8 , unless otherwise specified.
Table 7. Electrical specifications for power section
Symbol Parameter Conditions Min. Typ. Max. Unit
Po Output power BTL
THD = 1% - 8 -
W
THD = 10% - 10 -
R
dsON
Power P-
channel/N-channel
MOSFET (total bridge)
ld = 1 A - 106 m
l
dss
Power P-
channel/N-channel leakage
V
CC
= 18 V - - 10 µA
gP
Power P-channel R
dsON
matching
ld = 1 A 95 - - %
gN
Power N-channel R
dsON
matching
ld = 1 A 95 - - %
I
LDT
Low-current dead time
(static)
Resistive load,
refer to Figure 4
- 5 10 ns
I
HDT
High-current dead time
(dynamic)
Refer to Figure 5 -1020ns
t
r
Rise time
Resistive load,
refer to Figure 4
- 8 10 ns
t
f
Fall time
Resistive load,
refer to Figure 4
- 8 10 ns
V
CC
Supply voltage - 4.5 - 18 V
I
VCC
Supply current from V
CC
in
power down
PWRDN = 0 30 60 200 µA
Supply current from V
CC
in
operation
PCM input signal = -60 dBFS
Switching frequency =
384 kHz
No LC filters
-3050mA
I
VDD_DIG
Supply current for FFX
processing (reference only)
Internal clock = 49.152 MHz 10 30 50 mA
Supply current in standby - 8 11 25 mA
Av_DIG Digital Gain 24 dBFS
I
SCP
Short-circuit protection High-impedance output
(1)
2.7 3.8 5.0 A
V
OVP
Overvoltage protection
threshold
22.9 V
V
UVP
Undervoltage protection
threshold
--3.5 4.3V
t
min
Output minimum pulse
width
No load 20 30 60 ns
DocID025317 Rev 2 9/17
STA333SML Electrical specifications
17
THD+N
Total harmonic distortion
and noise
FFX stereo mode, Po = 1 W,
f = 1 kHz
- 0.05 0.2 %
DR Dynamic range - - 100 - dB
SNR
Signal to noise ratio in
ternary mode
A-weighted - 100 -
dB
Signal to noise ratio in
binary mode
A-weighted - 90 -
PSRR Power supply rejection ratio
FFX stereo mode, < 5 kHz,
V
RIPPLE
= 1 V RMS
audio input = dither only
-80-dB
X
TALK
Crosstalk
FFX stereo mode, < 5 kHz,
One channel driven at 1 W
the other channel measured
-80-dB
Peak efficiency
in FFX mode
Po = 2 x 10 W into 8 -90-%
1. The I
SCP
current limit data is for 1 channel of BTL configuration, thus, 2 * I
SCP
drives the 2-channel BTL
configuration.
Table 7. Electrical specifications for power section (continued)
Symbol Parameter Conditions Min. Typ. Max. Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

STA333SML

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Description:
Audio Amplifiers ANALOG
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