P
P
D
D
6
6
4
4
0
0
0
0
1
1
/
/
H
H
1
1
-
-
P
P
o
o
r
r
t
t
P
P
o
o
E
E
M
M
a
a
n
n
a
a
g
g
e
e
r
r
D
D
a
a
t
t
a
a
s
s
h
h
e
e
e
e
t
t
C
C
O
O
M
M
P
P
A
A
N
N
Y
Y
C
C
O
O
N
N
F
F
I
I
D
D
E
E
N
N
T
T
I
I
A
A
L
L
Copyright © 2009 Microsemi
Rev. 1.3 2009-02-23 Analog Mixed Signal Group
2381 Morse Avenue, Irvine, CA 92614, USA; Phone (USA): (800) 713-4113, (ROW): (949) 221-7100 Fax: (949) 756-0308
6
This ground plane should be 1500Vrms isolated from
the PoE circuitry as well as the power supply for the
PoE circuitry. The digital and analog grounds are
electrically the same ground. However, in order to
reduce noise coupling, the grounds are physically
separated and connected only at a single point.
5V Regulator
A single port application includes a 5V regulator
(Vcc) fed by the Vmain through D1 and D3 Zener
diodes and provides up to 25 mA used to power the
CPU and peripheral components in the PoE domain.
Using a 3% accuracy power supply for the PoE
circuitry D1 and D3 should be selected according to
the power supply nominal voltage set point using the
following graph.
D1 voltage plus D3 voltage as seen in the below
graph, should be evenly divided between the two
Zener diodes.
D1+D3 voltage (Vdc)
If an adequate 5V power source is available, the 5V
regulation circuitry can be removed and the Zener
diodes may be replaced with lower current (5 mA)
Zener diodes but with same voltage requirements.
Detailed Application
Description____________
(See Figure 2)
The PD64001/H performs a multitude of internal
operations and PoE functions, requiring a bare
minimum of external components.
The device is based on Atmel's ATtiny461 MCU.
Each PD64001/H device handles one port. Figure 2
shows the device with its related components for a
1-port configuration.
Mode Configuration - set by the resistor divider
(R7/R8) tied in to the RMODE line. The values are
fixed for each mode of operation and described in
the "R Mode pin" section in this document.
Line Detection Circuitry – when performing a line
detection procedure, the PoE device utilizes certain
voltage levels over the output port. These levels are
produced by switched resistor dividers and sensed
by the PD64001/H in order to confirm a valid PD
connection.
Current Loop Circuitry – the current is controlled by
Q4 MOSFET. The PD64001/H provides PWM signal
via pin#2 with a constant duty cycle (depending on
the R mode configuration). This PWM signal is
filtered and utilized as the current limit circuitry
voltage reference.
Sense Resistors – for each powered port, two
2-Ohm 2010 (1%) resistors connected in parallel
(1-Ohm equivalent) are used in series with the
output (R9, R11). In cases where the ambient
temperature drops below 70
0
C, or the product does
not have to meet 802.3at power, a single 1-Ohm
2010 (1%) resistor is adequate.
Classification Circuitry
– Upon port investigation
completion, the PD should be classified by its
classification current signature. Two voltage levels
are set over the port, derived from a reference
voltage filtered from PD64001/H's pin#4 (PWM
signal) and sent to an operational amplifier
controlling Q4.
Output port
- The load resistance of the PD attached
to the port is presented in parallel with R13.
The resulting voltage developed across both
resistances is monitored to establish the 802.3af/at
compatibility.
LED indication
- The 1 port application may use the
PD64001/H LED1 and LED2 pins for system status
indications as shown below:
R30 20K PD-1206
R31 1K
Vmain
R33 1K
LED2
LED1
D10
Vcc
Vmain_OK
