IRPLHALO1E
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The IRPLHALO1E reference design board uses a toroidal output transformer that has the
secondary windings spread over as much of the core as possible to minimize the leakage
inductance, which is inherently high in such constructions. This allows sufficient current to
shut down the convertor rapidly when the output is short circuited.
Note
Ready wound toroidal output transformers as used in the IRPLHALO1E design kit are available
from Vogt or Kaschke. These have many advantages including high isolation breakdown capability
because of the moulded plastic separator between the primary and secondary.
Short circuit current
The short circuit current that appears at the primary is dependent on the primary leakage induc-
tance of the output transformer as well as the value of the half bridge capacitors. The half bridge
capacitors should be kept as small as possible in order to limit this current. However, they also need
to be large enough to be able to handle the ripple current, i.e. half the primary current flowing in
each capacitor at the IR2161 oscillator frequency.
Adaptive Dead Time
Because of the fact that the DC bus voltage varies during the mains half cycle the dead time may
need to vary in order to achieve soft switching all of the time. The IR2161 has an adaptive dead time
system that detects the point at which the voltage at the half bridge slews to 0V (COM) and sets the
LO output high at this point. There is an internal sample and hold system that allows the same delay
to be used to set HO high after LO has gone low. This reacts on a cycle-by-cycle basis of the
oscillator and therefore will adjust the dead time as necessary regardless of external conditions.
The designer does not need to take into account parasitic capacitances in the MOSFETs or leakage
inductance in the output transformer and set the dead time accordingly.
The system is designed operate down to dead times of less than 250nS which should be low
enough to accommodate the output transformer leakage inductance and parasitic MOSFET ca-
pacitances of a practical Halogen convertor. If the ADT function does not operate the dead time
reverts to a preset fixed value that will, in most cases, prevent serious losses due to hard switching.
The slew rate can easily be increased, if necessary, by increasing the value of the snubber capaci-
tor. This does, however result in the failure of the VS voltage to slew completely at reduced loads
and so CSNUB should be kept as low as possible, but high enough to maintain the supply for the
charge pump to VCC. Some of the supply current may also be provided through RD and CD allow-
ing the charge pump to provide only part of it and hence the value of CSNUB can be as low as
220pF.
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In the event of the voltage at the half bridge failing to slew all the way down to COM the adaptive
dead time circuit will time out after 1 to 1.5uS and switch on the relevant MOSFET thus operating
with hard switching. This could happen during the first few cycles after start up. It should never be
the case in normal running conditions unless the load is very light or the primary leakage induc-
tance is excessive or that an unnecessarily large snubber capacitor is present.
This system avoids the need for an external resistor to program the dead time and contributes with
the multi functional nature of CSD to the IR2161 being realized with only 8 external pins.
Dimming
Almost any Halogen convertor available can be dimmed
by an external phase cut dimmer that operates in trailing
edge mode. This means that at the beginning of the line
voltage half cycle voltage the switch inside the dimmer is
closed and mains voltage is supplied to the convertor al-
lowing the convertor to operate normally. At some point
during the half cycle the switch inside the dimmer is opened
and voltage is no longer applied. The DC bus inside the
convertor almost immediately drops to 0V and the output
is no longer present. In this way bursts of high frequency
output voltage are applied to the lamp. The RMS voltage
across the lamp will naturally vary depending on the
phase angle at which the dimmer switch switches off. In this
way the lamp brightness may easily be varied from zero to maximum output.
Trailing edge dimmers are less common however than
leading edge dimmers. This is because they are more
expensive to make and need to incorporate a pair of
MOSFETs or IGBTs whereas a leading edge dimmer is
based around a single triac.
Conversely many Halogen convertors are not able to op-
erate with leading edge dimmers because of the fact that
they are based around a triac. It is possible however to
design a Halogen convertor that will work effectively with
a triac based dimmer by paying attention to design the
input filter components correctly and to ensure that at the
firing point of the triac the oscillator will start up rapidly. In
the IR2161 based system this is easy to achieve through
the addition of RD and CD which conduct a large current
DC BUS VOLTAGE
LAMP VOLTAGE
Fig. 6 Leading Edge Dimming
Fig. 5 Trailing Edge Dimming
DC BUS VOLTAGE
LAMP VOLTAGE
IRPLHALO1E
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to VCC due to the high dv/dt that occurs when the triac fires and the bus voltage rises rapidly from
zero to the AC line voltage. If the VCC voltage falls below UVLO- during the time when the triac in
the dimmer is off the soft start will not be initiated when voltage because the soft start circuit is not
reset until VCC drops approxmately 2V below UVLO-. This takes some time as the VCC capacitor
discharges very slowly during UVLO micro-power operation. The intermediate period is referred to
as Standby mode.
During dimming the voltage compensation circuit will cause a frequency shift upward at angles
above 90
° because the peak voltage at CS will be reduced, however this will not have a noticeable
effect on the light output.
The problem associated with operation of Halogen convertors with triac dimmers is due to the fact
that after a triac has been fired it will conduct until the current falls below its holding current. If the
load is purely resistive (as in a filament lamp directly connected to the dimmer) this will naturally
happen at the end of the line voltage half cycle as the current has to fall to zero. In a Halogen
convertor it is necessary to place a capacitor and inductor at the AC input to comply with regulations
regarding EM conducted emissions. This means that when the line voltage falls to zero there could
still be some current flowing that is enough to keep the triac switched on and so the next cycle will
follow through and not be phase cut as required. This can happen intermittently resulting in flicker-
ing of the lamps. The way to avoid the problem is to ensure that the product has the smallest
possible filter capacitor CF and to state a minimum load for the convertor. This would be typically
one third of the maximum load to avoid problems of this kind.
EMC Issues
The IRPLHALO1E demo board has not been EMC tested although a filter capacitor CLF and inductor
LF are fitted. The capacitor value may not be increased beyond a certain point to improve filtering
as this causes problems when dimming with triac type phase cut dimmers, i.e. that the phase shift
introduced can prevent the triac current dropping below its holding current at the end of the line
voltage half cycle and so the dimmer no longer functions. In order to prevent this, the proportion of
resistive load presented to the dimmer output must be sufficient for the capacitance. A good rule of
thumb to apply is that no more than 1nF of capacitance should be used per Watt of the maximum
power rating of the convertor, e.g. for a 100W convertor, use a 100nF capacitor. This should allow
dimming to work even at reduced loads without any difficulties. The filter inductor value should be
increased to reduce the conducted emmissions below the limits of the applicable EMC standard.
The inductor should have a powdered Iron core rather than Ferrite as this can handle a much larger
current before saturating.

IRPLHALO1E

Mfr. #:
Manufacturer:
Infineon / IR
Description:
Power Management IC Development Tools Halogen Cnvrtr 220/230VAC
Lifecycle:
New from this manufacturer.
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