Data Sheet 7 Rev. 1.2, 2009-11-09
TLE4253
Electrical Characteristics
5 Electrical Characteristics
5.1 Tracking Regulator
The output voltage V
Q
is controlled by comparing it to the voltage applied at pin ADJ/EN and driving a PNP pass
transistor accordingly. The control loop stability depends on the output capacitor
C
Q
, the load current, the chip
temperature and the poles/zeros introduced by the integrated circuit. To ensure stable operation, the output
capacitor’s capacitance and its equivalent series resistor ESR requirements given in the table “Functional Range”
have to be maintained. For details see also the typical performance graph “Output Capacitor Series Resistor
ESR
CQ
vs. Output Current I
Q
”. Also, the output capacitor shall be sized to buffer load transients.
An input capacitor
C
I
is strongly recommended to buffer line influences. Connect the capacitors close to the IC
terminals.
Protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events. These
safeguards contain output current limitation, reverse polarity protection as well as thermal shutdown in case of
overtemperature.
In order to avoid excessive power dissipation that could never be handled by the pass element and the package,
the maximum output current is decreased at high input voltages.
An overtemperature protection circuit prevents the IC from immediate destruction under fault conditions (e. g.
output continuously short-circuited to GND) by reducing the output current. A thermal balance below 200 °C
junction temperature is established. Please note that a junction temperature above 150 °C is outside the maximum
ratings and reduces the IC lifetime.
The TLE4253 allows a negative supply voltage. However, several small currents are flowing into the IC. For details
see electrical characteristics table and typical performance graph. The thermal protection circuit is not operating
during reverse polarity condition.
Table 1 Electrical Characteristics Tracking Regulator
V
I
= 13.5 V; V
ADJ/EN
≥ 2.0 V; V
FB
= V
Q
; -40 °C ≤ T
j
≤ 150 °C;
all voltages with respect to ground (unless otherwise specified).
Pos. Parameter Symbol Limit Values Unit Test Condition
Min. Typ. Max.
5.1.1 Output Voltage Tracking
Accuracy
∆
V
Q
= V
EN/ADJ
- V
Q
∆V
Q
-5 – 5 mV I
Q
= 30 mA;
V
ADJ/EN
= 5 V
5.1.2 -10 – 10 mV 0.1 mA ≤
I
Q
≤ 200 mA;
3.5 V ≤
V
I
≤ 32 V
V
ADJ/EN
= 2 V
5.1.3 -15 – 15 mV 0.1 mA ≤
I
Q
≤ 250 mA;
9 V ≤
V
I
≤ 32 V
V
ADJ/EN
= 5 V
5.1.4 Load Regulation
steady-state
|d
V
Q,load
|– – 10 mV I
Q
= 0.1 mA to 200 mA;
V
ADJ/EN
= 5 V
5.1.5 Line Regulation
steady-state
|d
V
Q,line
|– – 10 mV V
I
= 6 V to 32 V;
I
Q
= 10 mA
V
ADJ/EN
= 5 V
5.1.6 Power Supply Ripple
Rejection
PSRR
60 – – dB f
ripple
= 100 Hz;
V
ripple
= 1 Vpp
C
Q
= 10 µF, ceramic type
1)
