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A1445EEWLT-P

P1-P3P4-P6P7-P9
Low-Voltage Full-Bridge Brushless DC Motor Driver
with Hall Commutation, Externally Controlled Speed Regulation, Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1444 and
A1445
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Continued on the next page...
ELECTRICAL CHARACTERISTICS Valid over supply voltage and ambient temperature ranges, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ.
1
Max. Unit
Supply Voltage V
DD
T
J
< T
J
(max) 2.0 – 4.2 V
Extended Supply Voltage
2
V
DDE
T
J
< T
J
(max) 1.8 – 4.2 V
Supply Current I
DD(ON)
V
IN
>V
INHI
, T
A
= 25°C, no load – 4 6 mA
V
IN
< V
INLO
, T
A
= 25°C – – 10 μA
Total Output On-Resistance
3
R
DS(on)
I
OUT
= 50 mA, V
DD
= 2 V, T
A
= 25°C – 3.9 – Ω
I
OUT
= 50 mA, V
DD
= 3 V, T
A
= 25°C – 2.6 – Ω
I
OUT
= 50 mA, V
DD
= 4 V, T
A
= 25°C – 2.2 – Ω
Reverse Battery Current I
RDD
V
RDD
= –4.2 V, current flowing out of VDD pin,
T
A
= 25°C
– – –10 mA
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Input Threshold
V
INHI
0.7 × V
DD
–– V
V
INLO
– – 0.2 × V
DD
V
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Input Current I
IN
V
DD
= 3.6 V – 1.0 5 μA
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Reverse Input Current I
RIN
V
RIN
= –4.2 V, current flowing out of
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin,
T
A
= 25°C
– – –10 mA
Restart Delay
4
t
RS
V
DD
= 3.6 V – 100 – ms
Hall Chopping Settling Time
5
t
S(CHOP)
– 160 – μs
Thermal Shutdown Limit T
JTSD
Device is active – 165 – °C
Thermal Shutdown Hysteresis T
JTSD(HYS)
Device is active – 20 – °C
Internal PWM Frequency f
PWM
– 40 – kHz
PDC High Level Threshold V
PDCH
PDC input going from low to high state V
DD
–0.5 – V
DD
V
PDC Low Level Threshold V
PDCL
PDC input going from high to low state 0 – 0.5 V
PDC Input Current
6
I
PDCH
Steady state condition, PDC pin high – – 30 μA
I
PDCL
Steady state condition, PDC pin low state –30 – – μA
Internal PWM Duty Cycle DC
PWM
A1444
V
PDC
< V
PDCL
, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 56 – %
PDC Pin Floating, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 62 – %
V
PDC
> V
PDCH
, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 68 – %
A1445
V
PDC
< V
PDCL
, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 71 – %
PDC Pin Floating, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 80 – %
V
PDC
> V
PDCH
, V
DD
= V
DDN
,
S
ROT
> S
ROT(th)
– 89 – %
Low-Voltage Full-Bridge Brushless DC Motor Driver
with Hall Commutation, Externally Controlled Speed Regulation, Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1444 and
A1445
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Magnetic Switchpoints
B
OP
2 V ≤ V
DD
≤ 4 V – 35 75 G
B
RP
2 V ≤ V
DD
≤ 4 V –75 –35 – G
B
HYS
2 V ≤ V
DD
≤ 4 V – 70 – G
Output Polarity
VOUT1
B < B
RP
– LOW – V
B > B
OP
– HIGH – V
VOUT2
B < B
RP
– HIGH – V
B > B
OP
– LOW – V
1
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as T
A
= 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
2
Device operates with lower supply voltages, down to 1.8 V, with slight variation in specification of magnetic switchpoints and Total Output On-Resistance.
3
Total Output On-Resistance = R
DS(on)Q1
+ R
DS(on)Q4
, or R
DS(on)Q2
+ R
DS(on)Q3
, where Qx refers to the internal full-bridge transistors.
4
Restart Delay is the duration required from power-up of the device to valid device output.
5
Hall Chopping Settling Time is the delay from power-on of the device to the initial valid device output.
6
Positive current is defined as flowing into the device.
ELECTRICAL CHARACTERISTICS (continued) valid over supply voltage and ambient temperature ranges, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ.
1
Max. Unit
Low-Voltage Full-Bridge Brushless DC Motor Driver
with Hall Commutation, Externally Controlled Speed Regulation, Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1444 and
A1445
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Functional Description
Soft Switching
The A1444 and A1445 devices include a soft switching algorithm
that controls the output switching slew rate for both output pins.
As a result, the devices are ideal for use in applications requiring
low audible switching noise and low EMI interference.
Braking and Sleep Mode
The S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin accepts an external signal that enables braking
and a sleep mode. During braking, the device reverses the polar-
ity of the output bridge for a fixed time period, then the device
enters sleep mode. In sleep mode, the device current consumption
gets reduced to an extremely low level, conserving battery power.
Antistall Algorithm
If a stall condition occurs, the device will execute an antistall
algorithm to restart the motor.
Device Start-up
The start-up behavior of the device output is determined by the
applied magnetic field, as specified in the Electrical Characteris-
tics table.
Speed Control
When the rate of rotation exceeds the specified threshold,
S
ROT(th)
, the A1444/A1445 output bridge becomes controlled by
an internally generated PWM signal. The duty cycle of the inter-
nal PWM signal regulates the maximum motor rpm. The PWM
duty cycle, however, is user-selectable through the state of the
PDC pin. The PWM duty cycle options are given in the Electrical
Characteristics table.
P1-P3P4-P6P7-P9

A1445EEWLT-P

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IC MOTOR DRIVER 1.8V-4.2V 6DFN
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