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AT91FR4081
1386C–ATARM–02/02
Architectural
Overview
The AT91FR4081 integrates Atmel’s AT91R40807 ARM Thumb processor and an
AT49BV/LV8011 8-Mbit Flash memory die in a single compact 120-ball BGA device. The
address, data and control signals, except the Flash memory enable, are internally
interconnected.
The AT91R40807 architecture consists of two main buses, the Advanced System Bus (ASB)
and the Advanced Peripheral Bus (APB). Designed for maximum performance and controlled
by the memory controller, the ASB interfaces the ARM7TDMI processor with the on-chip 32-bit
memories, the External Bus Interface (EBI) and the AMBA
™
Bridge. The AMBA Bridge drives
the APB, which is designed for accesses to on-chip peripherals and optimized for low power
consumption.
The AT91FR4081 implements the ICE port of the ARM7TDMI processor on dedicated pins,
offering a complete, low-cost and easy-to-use debug solution for target debugging.
Memories The AT91FR4081 embeds 136K bytes of internal SRAM. The internal memory is directly con-
nected to the 32-bit data bus and is single-cycle accessible. This provides maximum
performance of 36 MIPS at 40 MHz by using the ARM instruction set of the processor, mini-
mizing system power consumption and improving on the performance of separate memory
solutions.
The AT91FR4081 features an External Bus Interface (EBI), which enables connection of
external memories and application-specific peripherals. The EBI supports 8- or 16-bit devices
and can use two 8-bit devices to emulate a single 16-bit device. The EBI implements the early
read protocol, enabling faster memory accesses than standard memory interfaces.
The AT91FR4081 embeds a Flash memory organized as 512K 16-bit words, accessed via the
EBI. Its main function is as a program memory. A 16-bit Thumb instruction can be loaded from
Flash memory in a single access. Separate MCU and Flash memory reset inputs (NRST and
NRSTF) are provided for maximum flexibility. The user is thus free to tailor the reset operation
to the application.
The AT91FR4081 integrates resident boot software called AT91 Flash Uploader software. The
AT91 Flash Uploader software is able to upload program application software into its Flash
memory.
Peripherals The AT91FR4081 integrates several peripherals, which are classified as system or user
peripherals.
All on-chip peripherals are 32-bit accessible by the AMBA Bridge, and can be programmed
with a minimum number of instructions. The peripheral register set is composed of control,
mode, data, status and enable/disable/status registers.
An on-chip Peripheral Data Controller (PDC) transfers data between the on-chip USARTs and
on- and off-chip memories address space without processor intervention. Most importantly,
the PDC removes the processor interrupt handling overhead, making it possible to transfer up
to 64K contiguous bytes without reprogramming the start address, thus increasing the perfor-
mance of the microcontroller, and reducing the power consumption.
System Peripherals The External Bus Interface (EBI) controls the external memory or peripheral devices via an 8-
or 16-bit databus and is programmed through the APB. Each chip select line has its own pro-
gramming register.
The Power-saving (PS) module implements the Idle Mode (ARM7TDMI core clock stopped
until the next interrupt) and enables the user to adapt the power consumption of the microcon-
troller to application requirements (independent peripheral clock control).
The Advanced Interrupt Controller (AIC) controls the internal interrupt sources from the inter-
nal peripherals and the four external interrupt lines (including the FIQ) to provide an interrupt
