ST16C550
25
Rev. 5.01
General Read Timing when -AS is tied to GND
General Write Timing when -AS is tied to GND
A0-A2
-CS
-IOR
D0-D7
T6s'
T7w
T7h'
T9d
T12d
T12h
Active
Data
Valid
Address
Active
Valid
Address
Active
T6s'
T7h'
T12d
T12h
T7w’
A0-A2
-CS
-IOW
D0-D7
T6s'
T13w
T7h'
T15d
T16s
T16h
Active
Data
Valid
Address
Active
Valid
Address
Active
T6s'
T7h'
T16s
T16h
T13w’
ST16C550
26
Rev. 5.01
Modem input/output timing
-
IOW
I
OW
-
RTS
-
DTR
-
CD
-
CTS
-
DSR
I
NT
-
IOR
I
OR
-
RI
T17d
T18d T18d
T19d
T18d
X450-MD-
1
Active
Active
Change of state
Change of state
Active Active
Active
Change of state
Change of state
Change of state
Active Active
ST16C550
27
Rev. 5.01
Receive timing
STOP
BIT
PARITY
BIT
DATA BITS (5-8)
D0 D1 D2 D3 D4 D5 D6 D7
5 DATA BITS
6 DATA BITS
7 DATA BITS
START
BIT
R
X
NEXT
DATA
START
BIT
I
NT
-
IOR
I
OR
T20d
T21d
16 BAUD RATE CLOCK
X450-RX-1
Active

ST16C550CP40-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
UART Interface IC SINGLE UART W/16 BYTE FIFO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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