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AD7846BP

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
AD7846
Rev. G | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
V
DD
to DGND −0.4 V to +17 V
V
CC
to DGND −0.4 V, V
DD
+ 0.4 V, or +7 V
(whichever is lower)
V
SS
to DGND +0.4 V to −17 V
V
REF+
to DGND V
DD
+ 0.4 V, V
SS
− 0.4 V
V
REF−
to DGND V
DD
+ 0.4 V, V
SS
− 0.4 V
V
OUT
to DGND
1
V
DD
+ 0.4 V, V
SS
− 0.4 V, or ±10 V
(whichever is lower)
R
IN
to DGND V
DD
+ 0.4 V, V
SS
− 0.4 V
Digital Input Voltage to DGND −0.4 V to V
CC
+ 0.4 V
Digital Output Voltage to DGND −0.4 V to V
CC
+ 0.4 V
Power Dissipation (Any Package)
To +75°C 1000 mW
Derates above +75°C 10 mW/°C
Operating Temperature Range
J, K Versions 0°C to +70°C
A, B Versions −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering) +300°C
1
V
OUT
can be shorted to DGND, V
DD
, V
SS
, or V
CC
provided that the power
dissipation of the package is not exceeded.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD7846
Rev. G | Page 7 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD7846
DB11
DB12
DB13
DB14
DB15
DB2
DB1
DB0
V
DD
V
CC
V
SS
V
OUT
V
REF+
V
REF–
R
IN
DB10
DB9
DB8
DB7
DB6
DGND
DB3
DB4
DB5
LDAC
R/W
CS
CLR
08490-007
Figure 7. PDIP Pin Configuration
25
24
23
22
21
20
19
5
6
7
8
9
10
11
4 3 2 1 28 27 26
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
12 13 14 15 16 17 18
LDAC
CLR
CS
R/W
DGND
DB6
V
OUT
V
REF+
V
REF–
R
IN
V
SS
DB15
DB14
V
DD
DB0
DB1
DB2
DB3
DB4
DB5
DB13
DB12
DB11
DB10
DB9
DB8
DB7
AD7846
V
CC
08490-008
Figure 8. CERDIP Pin Configuration
Table 5. Pin Function Descriptions
Pin Mnemonic Description
1 to 3 DB2 to DB0 Data I/Os. DB0 is LSB.
4 V
DD
Positive Supply for Analog Circuitry. This is +15 V nominal.
5 V
OUT
DAC Output Voltage.
6 R
IN
Input to Summing Resistor of DAC Output Amplifier. This is used to select output voltage ranges. See Table 6.
7 V
REF+
V
REF+
Input. The DAC is specified for V
REF+
= +5 V.
8 V
REF−
V
REF−
Input. For unipolar operation connect V
REF−
to 0 V, and for bipolar operation connect it to −5 V. The device is
specified for both conditions.
9 V
SS
Negative Supply for the Analog Circuitry. This is −15 V nominal.
10 to 19 DB15 to DB6 Data I/Os. DB15 is MSB.
20 DGND Ground for Digital Circuitry.
21 V
CC
Positive Supply for Digital Circuitry. This is +5 V nominal.
22
R/W
R/W Input. This pin can be used to load data to the DAC or to read back the DAC latch contents.
23
CS
Chip Select Input. This pin selects the device.
24
CLR
Clear Input. The DAC can be cleared to 000…000 or 100…000. See Table 7.
25
LDAC
Asynchronous Load Input to DAC.
26 to 28 DB5 to DB3 Data I/Os.
Table 6. Output Voltage Ranges
Output Range V
REF+
V
REF−
R
IN
0 V to +5 V +5 V 0 V V
OUT
0 V to +10 V +5 V 0 V 0 V
+5 V to −5 V +5 V −5 V V
OUT
+5 V to −5 V +5 V 0 V +5 V
+10 V to −10 V +5 V −5 V 0 V
AD7846
Rev. G | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
1V 2mV 20µs
–0.40VA1
08490-009
Figure 9. AC Feedthrough, V
REF+
= 1 V rms, 10 kHz Sine Wave
FREQUENCY (Hz)
V
OUT
(mV p-p)
0
100
2
1k 10k 100k 1M
4
6
1
3
5
7
8
V
DD
= +15V
V
SS
= –15V
V
REF
+
= +1V rms
V
REF
–
= 0V
08490-010
Figure 10. AC Feedthrough to V
OUT
vs. Frequency
FREQUENCY (Hz)
30
0
10 100 1k 10k 100k 1M 10M
20
10
5
25
15
V
OUT
(V p-p)
V
DD
= +15V
V
SS
= –15V
V
REF+
= ±5V SINE WAVE
V
REF–
= 0V
GAIN = +2
08490-011
Figure 11. Large Signal Frequency Response
FREQUENCY (Hz)
NOISE SPECTRAL DENSITY (nV/√Hz)
0
100
100 1k 10k 100k 1M
200
300
400
50
150
250
350
450
500
V
REF+
= V
REF–
= 0V
GAIN = +1
DAC LOADED WITH ALL 1s
08490-012
Figure 12. Noise Spectral Density
50mV/DIV
5V/DIV
0.5µs/DIV
DATA
V
OUT
0
8490-013
Figure 13. Digital-to-Analog Glitch Impulse Without Internal Deglitcher
(10…000 to 011…111 Transition)
50mV/DIV
5V/DIV
DATA
5V/DIV
LDAC
1µs/DIV
V
OUT
0
8490-014
Figure 14. Digital-to-Analog Glitch Impulse with Internal Deglitcher
(10…000 to 011…111 Transition)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

AD7846BP

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Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 16-Bit VOut CMOS
Lifecycle:
New from this manufacturer.
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