NCP3102C
http://onsemi.com
20
The cross over combined compensation network can be
used to calculate the transconductance output compensation
network as follows:
C
C
=
1
F
PO
*
R
2
R
2
*R
1
*gm→
(eq. 46)
60.1 nF =
1
16.12 kHz
*
10 kΩ
10 kΩ + 31.6 kΩ
*3.4mS
C
C
= Compensation capacitor
F
PO
= Pole frequency
gm = T ransconductance of amplifier
R
1
= Top of resistor divider
R
2
= Bottom of resistor divider
R
C
=
1
2*F
LC
*C
C
*
2
2
+ f
cross
*CO
ESR
*C
OUT
→
(eq. 47)
2.91 kΩ =
1
2 * 2.77 kHz * 60.1 nF *
2
2
+ 27 kHz * 12 mΩ *1000mF
C
C
= Compensation capacitance
CO
ESR
= Output capacitor ESR
C
OUT
= Output capacitance
f
cross
= Crossover frequency
F
LC
= Output inductor and capacitor frequency
R
C
= Compensation resistor
C
P
= C
OUT
*
CO
ESR
R
C
*2*π
→
(eq. 48)
656 pF = 1000 mF*
12 mΩ
2.91 kΩ *2*π
CO
ESR
= Output capacitor ESR
C
OUT
= Output capacitor
C
P
= Compensation pole capacitor
R
C
= Compensation resistor
Calculating Soft--Start Time
To calculate the soft start delay and soft start time, the
following equations can be used.
t
SSdelay
=
C
P
+ C
C
*83V
I
SS
(eq. 49)
5.04 ms =
0.656 nF + 60.1 nF
*0.83V
10 mA
C
P
= Compensation pole capacitor
C
C
= Compensation capacitor
I
SS
= Soft start current
The time the output voltage takes to increase from 0 V to a
regulated output voltage is t
ss
as shown in Equation 50:
t
SS
=
C
P
+ C
C
*D*V
ramp
I
SS
→
(eq. 50)
1.837 ms =
0.656 nF + 60.1 nF
*27.5%*1.1V
10 mA
C
P
= Compensation pole capacitor
C
C
= Compensation capacitor
D = Duty ratio
I
SS
= Soft--start current
t
SS
= Soft--start interval
V
ramp
= Peak--to--peak voltage of the ramp
V
900 mV
Vcomp
Vout
Figure 30. Soft Start Ramp
The delay from the charging of the compensation network
to the bottom of the ramp is considered t
ss
delay
. The total
delay time is the addition of the current set delay and t
ss
delay
,
which in this case is 3.2 ms and 5.04 ms respectively, for a
total of 8.24 ms.
Calculating Input Inrush Current
The input inrush current has two distinct stages: input
charging and output charging. The input charging of a buck
stage is usually not controlled, and is limited only by the
input RC network and the output impedance of the upstream
power stage. If the upstream power stage is a perfect voltage
source, then the input charge inrush current can be depicted
as shown in Figure 31 and calculated as:
IPK
Figure 31. Input Charge Inrush Current
TIME
CURRENT