UPA2375T1P-E1-A Datasheet UPA2375T1P-E1-A | P1-P3

R07DS0573EJ0100 Rev.1.00 Page 1 of 10

Dec 05, 2011

Preliminary Data Sheet

μ

PA2375T1P

N-CHANNEL MOSFET FOR SWITCHING

DESCRIPTION

The

μ

PA2375T1P is a switching device, which can be driven directly by a 2.5 V power source.

The

μ

PA2375T1P features a low on-state resistance and excellent switching characteristics, and is suitable for single

cell LiB application.

FEATURES

• 2.5 V drive available

• Ultra low on-state resistance

R

SS(on)1

= 11.4 mΩ MAX. (V

GS

= 4.5 V, I

S

= 5 A)

R

SS(on)2

= 12.4 mΩ MAX. (V

GS

= 4.0 V, I

S

= 5 A)

R

SS(on)3

= 13.0 mΩ MAX. (V

GS

= 3.8 V, I

S

= 5 A)

R

SS(on)4

= 17.0 mΩ MAX. (V

GS

= 3.1 V, I

S

= 5 A)

R

SS(on)5

= 23.0 mΩ MAX. (V

GS

= 2.5 V, I

S

= 5 A)

• Built-in G-S protection diode against ESD

ORDERING INFORMATION

Part No. Lead Plating Packing Package

μ

PA2375T1P-E1- A

∗

1

Ni/Au Reel 5000 p/reel 6-pin EFLIP-LGA

Note:

∗

1. Pb-free (This product does not contain Pb in the external electrode and other parts.)

ABSOLUTE MAXIMUM RATINGS (T

A

= 25°C)

Item Symbol Ratings Unit

Source to Source Voltage (V

GS

= 0 V) V

SSS

24.0 V

Gate to Source Voltage (V

DS

= 0 V) V

GSS

±12.0 V

Source Current (DC)

∗

1

I

S(DC)

±10 A

Source Current (pulse)

∗

2

I

S(pulse)

±100 A

Total Power Dissipation (2 units)

∗

1

P

T1

1.75 W

Channel Temperature T

ch

150 °C

Storage Temperature T

stg

−55 to +150 °C

Note:

∗

1. Mounted on ceramic board (50 cm

2

× 1.0 mmt)

∗

2. PW ≤ 10

μ

s, Duty Cycle ≤ 1%

R07DS0573EJ0100

Rev.1.00

Dec 05, 2011

μ

PA2375T1P Chapter Title

R07DS0573EJ0100 Rev.1.00 Page 2 of 10

Dec 05, 2011

ELECTRICAL CHARACTERISTICS (T

A

= 25°C)

Characteristics Symbol MIN. TYP. MAX. Unit Test Conditions

Zero Gate Voltage Source Current I

SSS

1

μ

A V

SS

= 24 V, V

GS

= 0 V, TEST CIRCUIT 1

Gate Leakage Current I

GSS

±10

μ

A V

GS

= ±12 V, V

SS

= 0 V, TEST CIRCUIT 2

Gate to Source Cut-off Voltage

V

GS(off)

0.5 0.9 1.5 V V

SS

= 10 V, I

S

= 1.0 mA, TEST CIRCUIT 3

Forward Transfer Admittance

∗

1

| y

fs

| 7.0 S V

SS

= 5 V, I

S

= 5 A, TEST CIRCUIT 4

R

SS(on)1

6.5 9.0 11.4 mΩ V

GS

= 4.5 V, I

S

= 5 A, TEST CIRCUIT 5

R

SS(on)2

6.5 9.6 12.4 mΩ V

GS

= 4.0 V, I

S

= 5 A, TEST CIRCUIT 5

R

SS(on)3

6.5 9.8 13.0 mΩ V

GS

= 3.8 V, I

S

= 5 A, TEST CIRCUIT 5

R

SS(on)4

7.0 11.5 17.0 mΩ V

GS

= 3.1 V, I

S

= 5 A, TEST CIRCUIT 5

Source to Source On-state

Resistance

∗

1

R

SS(on)5

9.0 15.0 23.0 mΩ V

GS

= 2.5 V, I

S

= 5 A, TEST CIRCUIT 5

Input Capacitance C

iss

2250 pF V

SS

= 10 V,

Output Capacitance C

oss

670 pF V

GS

= 0 V,

Reverse Transfer Capacitance C

rss

510 pF f = 1.0 MHz, TEST CIRCUIT 7

Turn-on Delay Time t

d(on)

6.6

μ

s V

DD

= 20 V, I

S

= 10 A,

Rise Time t

r

44

μ

s

V

GS

= 4.0 V,

Turn-off Delay Time t

d(off)

72

μ

s

R

G

= 6.0 Ω,

Fall Time t

f

133

μ

s

TEST CIRCUIT 8

Total Gate Charge Q

G

40 nC

V

DD

= 19.2 V, V

G1S1

= 4.0 V, I

S

= 3 A,

TEST CIRCUIT 9

Body Diode Forward Voltage

∗

1

V

F(S-S)

0.9 V I

F

= 10 A, V

GS

= 0 V, TEST CIRCUIT 6

Note:

∗

1. Pulsed test

Both the FET1 and the FET2 are measured. Test circuits are example of measuring the FET1 side.

TEST CIRCUIT 1 I

SSS

TEST CIRCUIT 2 I

GSS

G2

S2

S1

V

SS

G1

A

When FET1 is

measured,

between GATE

and SOURCE of

FET2 are shorted.

G1

S1

V

GS

A

G2

G1

S2

S1

A

G2

TEST CIRCUIT 3 V

GS(off)

TEST CIRCUIT 4 | y

fs

|

When FET1 is

measured, between

GATE and

SOURCE of FET2

are shorted.

G1

S2

S1

V

GS

G2

VSS

A

G1

S2

S1

G2

A

ΔI

S

/ΔV

GS

G1

S2

S1

V

GS

G2

VSS

A

G1

S2

S1

G2

A

μ

PA2375T1P Chapter Title

R07DS0573EJ0100 Rev.1.00 Page 3 of 10

Dec 05, 2011

TEST CIRCUIT 5 R

SS(on)

TEST CIRCUIT 6 V

F(S-S)

V

SS

/I

S

G1

S2

S1

V

GS

G2

V

I

S

G1

S2

S1

G2

V

SS

When FET1 is

measured, FET2 is

added V

GS

+ 4.5 V.

G1

S1

V

GS

= 0 V

G2

V

IF

4.5 V

G1

S1

S2

G2

V

VSS

TEST CIRCUIT 7

C

iss

C

oss

C

rss

G1

S2

S1

G2

V

SS

Capacitance

Bridge

G1

S1

G2

Capacitance

Bridge

G1

S2

S1

G2

V

SS

Capacitance

Bridge

G1

S2

S1

G2

Capacitance

Bridge

G1

S2

S1

G2

V

SS

Capacitance

Bridge

G1

S2

S1

G2

Capacitance

Bridge

TEST CIRCUIT 8 t

d(on)

, t

r

, t

d(off)

, t

f

G1

S2

S1

R

G

G2

V

R

L

V

DD

PG.

V

0

V

GS

τ = 1 s

μ

Duty Cycle ≤ 1%

V

GS

Wave Form

V

SS

Wave Form

V

GS

10%

90%

V

GS

10%

0

V

SS

90%90%

t

d(on)

t

r

t

d(off)

t

f

10%

τ

V

SS

0

t

on

t

off

TEST CIRCUIT 9 Q

G

G1

S2

S1

I

G

= 2 mA

G2

A

R

L

V

DD

PG.

50 Ω

A

PG.

UPA2375T1P-E1-A

UPA2375T1P-E1-A

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