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SSL4120T/1,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P47
SSL4120T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Objective data sheet Rev. 1 — 21 June 2012 28 of 47
NXP Semiconductors
SSL4120T
Resonant power supply control IC with PFC
7.8.9 HBC high-frequency protection, HFP-HBC (pin RFMAX)
Normally the converter will not operate continuously at maximum frequency because it will
sweep down to much lower values. Certain error conditions, such as a disconnected
transformer, could cause the converter to operate continuously at maximum frequency. If
zero-voltage switching conditions are no longer present, the MOSFETs can overheat. The
SSL4120T features High-Frequency Protection (HFP) for the HBC controller to protect it
from being damaged in such circumstances.
HFP senses the voltage at pin RFMAX. This voltage indicates the current frequency.
When the frequency is higher than 75 % of the soft start frequency range, the protection
timer is started. The 75 % level corresponds to an RFMAX voltage of V
hfp(RFMAX)
(typ. 1.83 V).
7.8.10 HBC overcurrent regulation and protection, OCR and OCP
(pin SNSCURHBC)
The HBC controller is protected against overcurrent in two ways:
• Overcurrent regulation (OCR-HBC) which increases the frequency slowly; the
protection timer is also started.
• Overcurrent protection (OCP-HBC) which steps to maximum frequency.
A boost voltage compensation function is included to reduce the variation in the output
current protection level.
7.8.10.1 Boost voltage compensation
The primary current, also known as the resonant current, is sensed via pin SNSCURHBC.
It senses the momentary voltage across an external current sense resistor R
cur(HBC)
. The
use of the momentary current signal allows for fast overcurrent protection and simplifies
the stabilizing of overcurrent regulation. The OCR and OCP comparators compare
V
SNSCURHBC
with the maximum positive and negative values.
For the same output power, the primary current is higher when the boost voltage is low. A
boost compensation is included to reduce the dependency of the protected output current
level on the boost voltage. The boost compensation sources and sinks a current from the
SNSCURHBC pin. This current creates a voltage drop across the series resistor R
curcmp
.
The amplitude of the current depends linearly on the boost voltage. At nominal boost
voltage the current is zero and the voltage V
Cur(HBC)
across the current sense resistor is
also present at the SNSCURHBC pin. At the UVP-boost start level V
uvp(SNSBOOST)
, the
current is at a maximum. The direction of the current, sink or source, depends on the
active gate signal. The voltage drop created across R
curcmp
reduces the amplitude at the
pin, resulting in a higher effective current protection level. The amount of compensation is
set by the value of R
curcmp
. Figure 17 shows how the boost compensation works for an
artificial current signal. The sinking compensation current only flows when V
SNSCURHBC
is
positive because of the circuit implementation.
SSL4120T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Objective data sheet Rev. 1 — 21 June 2012 29 of 47
NXP Semiconductors
SSL4120T
Resonant power supply control IC with PFC
7.8.10.2 Overcurrent regulation, OCR-HBC
The lowest comparator levels at the SNSCURHBC pin, V
ocr(HBC)
(typ. −0.5 V and +0.5 V),
relate to the overcurrent regulation voltage. There are comparators for both the positive
and negative polarities. The positive comparator is active during the high-side on-time and
the following high-side to low-side non-overlap time. The negative comparator is active
during the remaining time. If either level is exceeded, the frequency will be slowly
increased. This is accomplished by discharging the soft start capacitor. Each time the
OCR level is exceeded, the event is latched until the next stroke and the soft start
discharge current is enabled. When both the positive and negative OCR levels are
exceeded, the soft start discharge current will flow continuously.
Overcurrent regulation is very effective at limiting the output current during start-up. A
smaller soft start capacitor can be used to achieve a faster start-up. Using a smaller
capacitor may result in an output current that is too high at times, but the OCR function will
slow down the frequency sweep when needed to keep the output current within the
specified limits. Figure 18
shows the operation of the OCR during output voltage start-up.
Fig 17. Boost voltage compensation
V
Cur(HBC)
= R
cur(HBC)
× I
Cur(HBC)
I
ocr(high)
I
ocp(high)
I
ocp(nom)
I
ocr(nom)
−I
ocr(nom)
−I
ocp(nom)
−I
ocr(high)
−I
ocp(high)
I
Cur(HBC)
I
SNSCURHBC
V
reg
V
uvp
V
Boost
GATELS
GATEHS
sink current only with positive V
SNSCURHBC
sink
source
0
0
0
t
t
t
t
low V
Boost
strong compensation
high OCP
low V
Boost
strong compensation
high OCR
nominal V
Boost
no compensation
nominal OCP
nominal V
Boost
no compensation
nominal OCR
V
SNSCURHBC
t
t
014aaa865
V
SNSCURHBC
V
ocr(HBC)
−V
ocr(HBC)
V
ocp(HBC)
−V
ocp(HBC)
SSL4120T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Objective data sheet Rev. 1 — 21 June 2012 30 of 47
NXP Semiconductors
SSL4120T
Resonant power supply control IC with PFC
The protection timer is also started. The Restart state is activated when the OCR-HBC
condition is still present after the protection time has elapsed.
7.8.10.3 Overcurrent protection, OCP-HBC
Under normal operating conditions, OCR is able to ensure the current remains below the
specified maximum values. In the event of certain error conditions, however, it might not
be fast enough to limit the current. OCP is implemented to protect against those error
conditions. The OCP level, V
ocp(HBC)
(typ. −1 V and +1 V), is higher than the OCR level
V
ocr(HBC)
.
When the OCP level is reached, the frequency immediately jumps to the maximum value
via the soft start reset, followed by a normal sweep down.
7.8.11 HBC capacitive mode regulation, CMR (pin HB)
The MOSFETs in the half-bridge drive the resonant circuit. Depending on the output load,
the output voltage, and the switching frequency this resonant circuit can have an inductive
impedance or a capacitive impedance. Inductive impedance is preferred because it
facilitates efficient zero-voltage switching.
Harmful switching in Capacitive mode is prevented by the adaptive non-overlap time
function (see Section 7.8.4.2
). An extra action is performed which results in Capacitive
Mode Regulation (CMR). CMR causes the half-bridge circuit to return to Inductive mode
from Capacitive mode.
Fig 18. Overcurrent regulation during start-up
I
ocr
−I
ocr
I
Cur(HBC)
I
ss(hf)(SSHBC)
I
ss(If)(SSHBC)
−I
ss(If)(SSHBC)
−I
ss(hf)(SSHBC)
I
SSHBC/EN
V
SSHBC/EN
V
fmin(SSHBC)
V
ss(hf-lf)(SSHBC)
V
fmax(SSHBC)
V
Output
V
reg
0
0
0 t
t
t
t
Fast soft-start sweep (charge and discharge) Slow soft-start sweep (charge and discharge)
014aaa866
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SSL4120T/1,518

Mfr. #:
Buy SSL4120T/1,518
Manufacturer:
NXP Semiconductors
Description:
Display Drivers & Controllers Resonant powersupply controller with PFC
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