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BUK7615-100A,118

P1-P3P4-P6P7-P7
Philips Semiconductors Product specification
TrenchMOS transistor BUK7615-100A
Standard level FET
Fig.7. Typical on-state resistance, T
j
= 25 ˚C
.
R
DS(ON)
= f(V
GS
); conditions I
D
= 25 A;
Fig.8. Typical transfer characteristics.
I
D
= f(V
GS
)
; conditions: V
DS
= 25 V; parameter T
j
Fig.9. Typical transconductance, T
j
= 25 ˚C
.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
Fig.10. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
Fig.11. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.12. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
5 101520
10
11
12
13
14
15
16
RDS(ON)/mOhm
VGS/V
0.5
1
1.5
2
2.5
3
-100 -50 0 50 100 150 200
Tmb / degC
a
Rds(on) normalised to 25degC
01234567
0
20
40
60
80
100
ID/A
VGS/V
Tj/C =
175
25
BUK759-60
-100 -50 0 50 100 150 200
0
1
2
3
4
5
Tj / C
VGS(TO) / V
max.
typ.
min.
0 20406080100
0
10
20
30
40
50
60
70
80
90
gfs/S
ID/A
012345
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
Sub-Threshold Conduction
typ
2%
98%
January 1999 4 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK7615-100A
Standard level FET
Fig.13. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
Fig.14. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 25 A; parameter V
DS
Fig.15. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.16. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 75 A
Fig.17. Avalanche energy test circuit.
Fig.18. Switching test circuit.
0.01 0.1 1 10 100
0
1
2
3
4
5
6
7
8
9
10
11
Thousands pF
VDS/V
Ciss
Coss
Crss
20 40 60 80 100 120 140 160 180
Tmb / C
120
110
100
90
80
70
60
50
40
30
20
10
0
WDSS%
0 20 40 60 80 100 120
0
2
4
6
8
10
12
VGS/V
QG/nC
VDS =
14V
80V
L
T.U.T.
VDD
RGS
R 01
VDS
-ID/100
+
-
shunt
VGS
0
W
DSS
= 0.5 ⋅LI
D
2
⋅BV
DSS
/(BV
DSS
−V
DD
)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
0
20
40
60
80
100
ID/A
VSDS/V
Tj/C =
175
25
RD
T.U.T.
VDD
RG
VDS
+
-
VGS
0
January 1999 5 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK7615-100A
Standard level FET
MECHANICAL DATA
Fig.19. SOT404 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
UNIT
A
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC EIAJ
mm
A
1
D
1
D
E
eL
p
H
D
Qc
2.54
2.60
2.20
15.4
14.8
2.9
2.1
9.65
8.65
1.6
1.2
10.3
9.7
4.5
4.1
1.40
1.27
0.85
0.60
0.64
0.46
b
DIMENSIONS (mm are the original dimensions)
SOT404
97-06-16
0 2.5 5 mm
scale
Plastic single-ended package (Philips version of D2-PAK); 2 leads SOT404
e e
E
b
D
1
H
D
D
Q
L
p
c
A
1
A
January 1999 6 Rev 1.000
P1-P3P4-P6P7-P7

BUK7615-100A,118

Mfr. #:
Buy BUK7615-100A,118
Manufacturer:
NXP Semiconductors
Description:
MOSFET N-CH 100V 75A D2PAK
Lifecycle:
New from this manufacturer.
Delivery:
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