MC100ES6111AC

MC100ES6111
Rev. 5, 07/2005
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Low Voltage 2.5/3.3 V Differential
ECL/PECL/HSTL Fanout Buffer
The MC100ES6111 is a bipolar monolithic differential clock fanout buffer.
Designed for most demanding clock distribution systems, the MC100ES6111
supports various applications that require distribution of precisely aligned
differential clock signals. Using SiGe:C technology and a fully differential
architecture, the device offers very low skew outputs and superior digital signal
characteristics. Target applications for this clock driver is high performance clock
distribution in computing, networking and telecommunication systems.
Features
1:10 differential clock distribution
35 ps maximum device skew
Fully differential architecture from input to all outputs
SiGe:C technology supports near-zero output skew
Supports DC to 2.7 GHz operation of clock or data signals
ECL/PECL compatible differential clock outputs
ECL/PECL/HSTL compatible differential clock inputs
Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply
Standard 32-lead LQFP package
32-lead Pb-free package available
Industrial temperature range
Pin and function compatible to the MC100EP111
Functional Description
The MC100ES6111 is designed for low skew clock distribution systems and supports clock frequencies up to 2.7 GHz. The
device accepts two clock sources. The CLKA input can be driven by ECL or PECL compatible signals, the CLKB input accepts
HSTL compatible signals. The selected input signal is distributed to 10 identical, differential ECL/PECL outputs. If V
BB
is con-
nected to the CLKA input and bypassed to GND by a 10 nF capacitor, the MC100ES6111 can be driven by single-ended ECL/
PECL signals utilizing the V
BB
bias voltage output.
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even
if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts
being used on that side should be terminated.
The MC100ES6111 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the
MC100ES6111 supports positive (PECL) and negative (ECL) supplies. The MC100ES6111 is pin and function compatible to the
MC100EP111.
MC100ES6111
LOW-VOLTAGE 1:10 DIFFERENTIAL
ECL/PECL/HSTL
CLOCK FANOUT DRIVER
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-04
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-04
Advanced Clock Drivers Devices
2 Freescale Semiconductor
MC100ES6111
Table 1. Pin Configuration
Pin I/O Type Function
CLKA, CLKA Input ECL/PECL Differential reference clock signal input
CLKB, CLKB Input HSTL Alternative differential reference clock signal input
CLK_SEL Input ECL/PECL Active clock input select
Q[0–9], Q[0–9] Output ECL/PECL Differential clock outputs
V
EE
(1)
1. In ECL mode (negative power supply mode), V
EE
is either –3.3 V or –2.5 V and V
CC
is connected to GND (0 V). In PECL mode (positive
power supply mode), V
EE
is connected to GND (0 V) and V
CC
is either +3.3 V or +2.5 V. In both modes, the input and output levels are
referenced to the most positive supply (V
CC
).
Supply Negative power supply
V
CC
Supply Positive power supply. All V
CC
pins must be connected to the positive
power supply for correct DC and AC operation.
V
BB
Output DC Reference voltage output for single ended ECL or PECL operation
Table 2. Function Table
Control Default 0 1
CLK_SEL 0 CLKA, CLKA input pair is active. CLKA can be
driven by ECL or PECL compatible signals.
CLKB, CLKB input pair is active. CLKB can be
driven by HSTL compatible signals.
Figure 2. 32-Lead Package Pinout (Top View)
Q8
V
CC
Q2
Q1
Q0
V
CC
Q7
Q9
Q3
Q3
Q4
Q4
Q5
Q5
Q6
Q6
V
CC
CLK_SEL
CLKA
CLKA
V
BB
CLKB
CLKB
V
EE
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
12345678
24 23 22 21 20 19 18 17
16
MC100ES6111
V
CC
V
CC
Q2
Q1
Q0
Q7
Q8
Q9
0
1
CLKA
CLKA
CLKB
CLKB
CLK_SEL
V
CC
V
CC
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q5
Q5
Q6
Q6
Q7
Q7
Q8
Q8
Q9
Q9
V
BB
Figure 1. MC100ES6111 Logic Diagram
Advanced Clock Drivers Devices
Freescale Semiconductor 3
MC100ES6111
Table 3. Absolute Maximum Ratings
(1)
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Symbol Characteristics Min Max Unit Condition
V
CC
Supply Voltage –0.3 3.6 V
V
IN
DC Input Voltage –0.3 V
CC
+ 0.3 V
V
OUT
DC Output Voltage –0.3 V
CC
+ 0.3 V
I
IN
DC Input Current ±20 mA
I
OUT
DC Output Current ±50 mA
T
S
Storage Temperature –65 125 °C
T
Func
Functional Temperature Range T
A
= –40 T
J
= +110 °C
Table 4. General Specifications
Symbol Characteristics Min Typ Max Unit Condition
V
TT
Output Termination Voltage V
CC
– 2
(1)
1. Output termination voltage V
TT
= 0 V for V
CC
= 2.5 V operation is supported but the power consumption of the device will increase
V
MM ESD Protection (Machine Model) 200 V
HBM ESD Protection (Human Body Model) 4000 V
CDM ESD Protection (Charged Device Model) 2000 V
LU Latch-up Immunity 200 mA
C
IN
Input Capacitance 4.0 pF Inputs
θ
JA
Thermal resistance junction to ambient
JESD 51–3, single layer test board
JESD 51–6, 2S2P multilayer test board
83.1
73.3
68.9
63.8
57.4
59.0
54.4
52.5
50.4
47.8
86.0
75.4
70.9
65.3
59.6
60.6
55.7
53.8
51.5
48.8
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Natural convection
100 ft/min
200 ft/min
400 ft/min
800 ft/min
Natural convection
100 ft/min
200 ft/min
400 ft/min
800 ft/min
θ
JC
Thermal Resistance Junction to Case 23.0 26.3 °C/W MIL-SPEC 883E
Method 1012.1
T
J
Operating Junction Temperature
(2)
(Continuous Operation) MTBF = 9.1 years
2. Operating junction temperature impacts device life time. Maximum continuous operating junction temperature should be selected according
to the application life time requirements (See application note AN1545 and the application section in this data sheet for more information).
The device AC and DC parameters are specified up to 110°C junction temperature allowing the MC100ES6111 to be used in applications
requiring industrial temperature range. It is recommended that users of the MC100ES6111 employ thermal modeling analysis to assist in
applying the junction temperature specifications to their particular application.
110 °C

MC100ES6111AC

Mfr. #:
Manufacturer:
NXP / Freescale
Description:
Clock Buffer Buffer
Lifecycle:
New from this manufacturer.
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