Advanced Clock Drivers Devices
6 Freescale Semiconductor
MC100ES6111
Table 7. AC Characteristics (ECL: V
EE
= –3.3 V ± 5% or V
EE
= –2.5 V ± 5%, V
CC
= GND) or
(HSTL/PECL: V
CC
= 3.3 V ± 5% or V
CC
= 2.5 V ± 5%, V
EE
= GND, T
J
= 0°C to +110°C)
(1)
1. AC characteristics apply for parallel output termination of 50 Ω to V
TT
.
Symbol Characteristics Min Typ Max Unit Condition
Clock Input Pair CLKA, CLKA (PECL or ECL differential signals)
V
PP
Differential Input Voltage
(2)
(peak-to-peak)
2. V
PP
(AC) is the minimum differential ECL/PECL input voltage swing required to maintain AC characteristics including tpd and
device-to-device skew.
0.15 1.3 V
V
CMR
Differential Input Crosspoint Voltage
(3)
PECL
3. V
CMR
(AC) is the crosspoint of the differential ECL/PECL input signal. Normal AC operation is obtained when the crosspoint is within the
V
CMR
(AC) range and the input swing lies within the V
PP
(AC) specification. Violation of V
CMR
(AC) or V
PP
(AC) impacts the device
propagation delay, device and part-to-part skew.
V
EE
+ 1.0 V
CC
– 0.3 V
f
CLK
Input Frequency
(4)
4. The MC100ES6111 is fully operational up to 3.0 GHz and is characterized up to 2.7 GHz.
2.7 GHz Differential
t
PD
Propagation Delay CLKA or CLKB to Q0–9 280 400 530 ps Differential
Clock Input Pair CLKB, CLKB (HSTL differential signals)
V
DIF
Differential Input Voltage (peak-to-peak)
(5)
5. V
DIF
(AC) is the minimum differential HSTL input voltage swing required to maintain AC characteristics including t
PD
and device-to-device
skew.
0.4 1.0 V
V
X
Differential Input Crosspoint Voltage
(6)
6. V
X
(AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the V
X
(AC)
range and the input swing lies within the V
DIF
(AC) specification. Violation of V
X
(AC) or V
DIF
(AC) impacts the device propagation delay,
device and part-to-part skew.
V
EE
+ 0.1 V
EE
+ 0.68
V
EE
+ 0.9
V
EE
+ 2.1 V
f
CLK
Input Frequency 2.7 GHz Differential
t
PD
Propagation Delay CLKB to Q0-9 280 400 530 ps Differential
ECL Clock Outputs (Q0-9, Q0-9)
V
O(P-P)
Differential Output Voltage (peak-to-peak)
f
O
< 300 MHz
f
O
< 1.5 GHz
f
O
< 2.7 GHz
0.45
0.3
0.18
0.72
0.55
0.37
0.95
0.95
0.95
V
V
V
t
sk(O)
Output-to-Output Skew 35 ps Differential
t
sk(PP)
Output-to-Output Skew (part-to-part) f
O
< 1.5 GHz
f
O
> 1.5 GHz
150
250
ps
ps
Differential
t
JIT(CC)
Output Cycle-to-Cycle Jitter RMS (1σ) 1 ps
t
sk(P)
Output Pulse Skew
(7)
7. Output pulse skew is the absolute difference of the propagation delay times: | t
PLH
– t
PHL
|.
75 ps
t
r
, t
f
Output Rise/Fall Time 0.05 0.3 ns 20% to 80%
Figure 3. MC100ES6111 AC Test Reference
Differential Pulse
Generator
Z = 50Ω
R
T
= 50Ω
Z
O
= 50Ω
DUT
MC100ES6111
V
TT
= GND
R
T
= 50Ω
Z
O
= 50Ω
V
TT
= GND
