ICS8304AG-02 REVISION A FEBRUARY 4, 2013 2 ©2013 Integrated Device Technology, Inc.
ICS8304-02 Data Sheet LOW SKEW, 1-TO-4 LVCMOS/LVTTL FANOUT BUFFER
Pin Descriptions and Pin Characteristics
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Table
Table 3. OEx Function Table
NOTE: Asynchronous output enables.
Number Name Type Description
1, 2, 10, 16 OE0, OE1, OE2, OE3 Input Pullup
Output enable pins. Active HIGH. If pin is LOW, output is high
impedance. LVCMOS/LVTTL interface levels. See Table 3.
3, 11 V
DDO
Power Output supply pins.
4, 5, 12, 13 Q0, Q1, Q2, Q3 Output
Single-ended clock outputs. 15
output impedance.
LVCMOS/LVTTL interface levels.
6, 14 GND Power Power supply ground.
7 CLK Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels.
8V
DD
Power Power supply pin.
9, 15 nc Unused No connect.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
R
PULLUP
Input Pullup Resistor 51 k
R
PULLDOWN
Input Pulldown Resistor 51 k
C
PD
Power Dissipation
Capacitance
(per output)
V
DD,
V
DDO
= 3.465V or 2.625V 5 pF
V
DD
= 3.465V, V
DDO
= 2.625V 3 pF
R
OUT
Output Impedance
V
DDO
= 3.465V 15
V
DDO
= 2.625V 17
Inputs Outputs
OE3, OE2, OE1, OE0 Q3, Q2, Q1, Q0
0Hi-Z
1 Active (default)
