ICS8304AG-02 REVISION A FEBRUARY 4, 2013 4 ©2013 Integrated Device Technology, Inc.
ICS8304-02 Data Sheet LOW SKEW, 1-TO-4 LVCMOS/LVTTL FANOUT BUFFER
Table 4C. LVCMOS/LVTTL DC Characteristics, T
A
= 0°C to 70°C
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
V
DD
= 3.465V 2 V
DD
+ 0.3 V
V
DD
= 2.625V 1.7 V
DD
+ 0.3 V
V
IL
Input Low Voltage
V
DD
= 3.465V -0.3 0.8 V
V
DD
= 2.625V -0.3 0.7 V
I
IH
Input
High Current
CLK V
DD
= V
IN
= 3.465V or 2.625V 150 µA
OE3, OE2,
OE1, OE0
V
DD
= V
IN
= 3.465V or 2.625V 5 µA
I
IL
Input
Low Current
CLK
V
DD
= 3.465V or 2.625V,
V
IN
= 0V
-5 µA
OE3, OE2,
OE1, OE0
V
DD
= 3.465V or 2.625V,
V
IN
= 0V
-150 µA
V
OH
Output High Voltage
V
DDO
= 3.3V ± 5%; I
OH
= -12mA 2.6 V
V
DDO
= 2.5V ± 5%; I
OH
= -12mA 1.8 V
V
OL
Output Low Voltage
V
DDO
= 3.3V ± 5%; I
OL
= 12mA 0.5 V
V
DDO
= 2.5V ± 5%; I
OL
= 12mA 0.5 V
I
OZL
Output Hi-Z Current Low -5 µA
I
OZH
Output Hi-Z Current High A
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 250 MHz
tp
LH
Propagation Delay,
Low to High; NOTE 1
CLK 2.0 2.5 4.0 ns
tsk(o) Output Skew; NOTE 2, 5 Measured on the Rising Edge 30 60 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 400 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 400 600 1000 ps
odc Output Duty Cycle
Output Frequency < 150MHz 45 50 55 %
Output Frequency 150MHz 40 47 60 %
t
EN
Output Enable Time; NOTE 4 3 5 ns
t
DIS
Output Disable Time; NOTE 4 4 6 ns
ICS8304AG-02 REVISION A FEBRUARY 4, 2013 5 ©2013 Integrated Device Technology, Inc.
ICS8304-02 Data Sheet LOW SKEW, 1-TO-4 LVCMOS/LVTTL FANOUT BUFFER
Table 5B. AC Characteristics, V
DD
= V
DDO
= 2.5V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Table 5C. AC Characteristics, V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 250 MHz
tp
LH
Propagation Delay,
Low to High; NOTE 1
CLK 2.0 2.7 4.0 ns
tsk(o) Output Skew; NOTE 2, 5 Measured on the Rising Edge 30 60 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 425 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 400 750 1200 ps
odc Output Duty Cycle
Output Frequency < 150MHz 45 50 55 %
Output Frequency 150MHz 40 47 60 %
t
EN
Output Enable Time; NOTE 4 3 5 ns
t
DIS
Output Disable Time; NOTE 4 4 6 ns
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 250 MHz
tp
LH
Propagation Delay,
Low to High; NOTE 1
CLK 2.0 2.8 4.0 ns
tsk(o) Output Skew; NOTE 2, 5 Measured on the Rising Edge 30 60 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 425 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 400 750 1200 ps
odc Output Duty Cycle
Output Frequency < 150MHz 45 50 55 %
Output Frequency 150MHz 40 47 60 %
t
EN
Output Enable Time; NOTE 4 3 5 ns
t
DIS
Output Disable Time; NOTE 4 4 6 ns
ICS8304AG-02 REVISION A FEBRUARY 4, 2013 6 ©2013 Integrated Device Technology, Inc.
ICS8304-02 Data Sheet LOW SKEW, 1-TO-4 LVCMOS/LVTTL FANOUT BUFFER
Parameter Measurement Information
3.3V Core/3.3V LVCMOS Output Load Test Circuit
3.3V Core/2.5V LVCMOS Output Load Test Circuit
Part-to-Part Skew
2.5V Core/2.5V LVCMOS Output Load Test Circuit
Output Skew
Propagation Delay
SCOPE
Qx
GND
V
DD,
1.65V±5%
-1.65V±5%
V
DDO
SCOPE
Qx
GND
V
DDO
V
DD
1.25V±5%
-1.25V±5%
2.05V±5%
Qx
Qy
tsk(pp)
V
DDO
2
V
DDO
2
Part 1
Part 2
SCOPE
Qx
GND
V
DD,
1.25V±5%
-1.25V±5%
V
DDO
t
sk(o)
V
DDO
2
V
DDO
2
Qx
Qy
t
PD
V
DD
2
V
DDO
2
Q[0:3]
CLK

8304AG-02LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution Low Skew, 1-to-4 LVCMOS/LVTTL
Lifecycle:
New from this manufacturer.
Delivery:
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