PM25RL1A120 Datasheet PM25RL1A120 | P4-P6

MITSUBISHI <INTELLIGENT POWER MODULES>

PM25RL1A120

FLAT-BASE TYPE

INSULATED PACKAGE

May 2009

4

Detect Temperature of IGBT chip

–20 ≤ Tj ≤ 125°C

V

D = 15V, VCIN = 15V (Note-2)

V

D = 15V (Note-2)

3.5

—

Mounting part screw : M5

Main terminal part screw : M5

—

Symbol

Parameter

Mounting torque

Weight

Condition

Unit

N • m

g

Limits

Min.

Typ.

Max.

2.5

—

3.0

380

MECHANICAL RATINGS AND CHARACTERISTICS

—

VCE(sat)

ICES

VFM

V

mA

Min. Typ. Max.

V

Collector-Emitter Saturation

Voltage

Forward Voltage

Collector-Emitter Cutoff

Current

I

F = 25A

T

j = 25°C

T

j = 125°C

Unit

Parameter

Symbol

Condition

Limits

2.15

2.35

3.3

1

10

1.65

1.85

2.3

—

T

j = 25°C

T

j = 125°C

BRAKE PART

VD = 15V, IC = 25A

V

CIN = 0V, Pulsed (Fig. 1)

V

CE

= V

CES

, V

D

= 15V

(Fig. 5)

V

D = 15V, VCIN = 15V

Applied between : U

P-VUPC, VP-VVPC, WP-VWPC

UN • VN • WN • Br-VNC

ID

°C

V

mA

ms

16

4

1.8

2.3

—

12.5

—

0.01

15

—

mA

Circuit Current

Input ON Threshold Voltage

Input OFF Threshold Voltage

Short Circuit Trip Level

Short Circuit Current Delay

Time

Over Temperature Protection

Supply Circuit Under-Voltage

Protection

Fault Output Current

Minimum Fault Output Pulse

Width

V

th(ON)

Vth(OFF)

SC

t

off(SC)

OT

(hys)

UV

r

IFO(H)

IFO(L)

tFO

Trip level

Hysteresis

Trip level

Reset level

CONTROL PART

—

1.2

1.7

50

—

135

—

11.5

—

1.0

Parameter

Symbol

Condition

Max.

Min. Typ.

Unit

Limits

8

2

1.5

2.0

—

0.2

—

20

12.0

12.5

—

10

1.8

(Note-2) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to

protect it.

V

µs

VN1-VNC

V*P1-V*PC

Inverter part

Brake part

A

–20 ≤ T

j ≤ 125°C, VD = 15V (Fig. 3,6)

V

D = 15V (Fig. 3,6)

RECOMMENDED CONDITIONS FOR USE

Recommended value

Unit

Condition

Symbol Parameter

V

Applied across P-N terminals

Applied between : V

UP1-VUPC, VVP1-VVPC

VWP1-VWPC, VN1-VNC (Note-3)

Applied between : U

P-VUPC, VP-VVPC, WP-VWPC

UN • VN • WN • Br-VNC

Using Application Circuit of Fig. 8

Supply Voltage

Control Supply Voltage

Input ON Voltage

Input OFF Voltage

PWM Input Frequency

≤ 800

15.0 ± 1.5

≤ 0.8

≥ 9.0

≤ 20

VCC

VCIN(ON)

VCIN(OFF)

fPWM

VD

V

kHz

(Note-3) With ripple satisfying the following conditions: dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak

t

dead

Arm Shoot-through

Blocking

Time

For IPM’s each input signals (Fig. 7) ≥ 2.5

µs

≤

±

5V/µs

≤

2V

GND

15V

MITSUBISHI <INTELLIGENT POWER MODULES>

PM25RL1A120

FLAT-BASE TYPE

INSULATED PACKAGE

May 2009

5

PRECAUTIONS FOR TESTING

1. Before applying any control supply voltage (V

D), the input terminals should be pulled up by resistors, etc. to their corre-

sponding supply voltage and each input signal should be kept off state.

After this, the specified ON and OFF level setting for each input signal should be done.

2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-

lowed to rise above V

CES rating of the device.

(These test should not be done by using a curve tracer or its equivalent.)

P, (U,V,W,B)

U,V,W,B, (N) U,V,W,B, (N)

V

D (all)

IN

Fo

IN

Fo

VD (all)

V

CIN

(0V)

Ic

V V

P, (U,V,W,B)

V

CIN

(15V)

–Ic

Fig. 7 Dead time measurement point example

Fig. 1 VCE(sat) Test Fig. 2 VEC, (VFM) Test

0V

1.5V 1.5V

1.5V

2V

0V

t

tdeadtdeadtdead

1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value

IPM’ input signal V

CIN

(Upper Arm)

IPM’ input signal V

CIN

(Lower Arm)

10%

90%

trr

Irr

trtd(on)

tc(on)

tc(off)

td(off)

V

CIN

Ic

V

CE

10%

10% 10%

90%

tf

(ton = td(on) + tr) (toff = td(off) + tf)

Fo

P

N

CS

U,V,W

Vcc

Ic

V

D (all)

V

D (all)

P

U,V,W

VCIN

(15V)

VCIN

(15V)

Fo

Fig. 3 Switching Time and SC Test Circuit Fig. 4 Switching Time Test Waveform

a) Lower Arm Switching

Signal input

(Upper Arm)

Signal input

(Lower Arm)

Signal input

(Upper Arm)

Signal input

(Lower Arm)

b) Upper Arm Switching

VCIN

Fig. 5 ICES Test

Fig. 6 SC Test Waveform

SC Trip

Short Circuit Current

toff(SC)

VD (all)

U,V,W,B, (N)

P, (U,V,W,B)

A

Pulse

VCE

VCIN

(15V)

Ic

Fo

IN

Fo

Constant Current

MITSUBISHI <INTELLIGENT POWER MODULES>

PM25RL1A120

FLAT-BASE TYPE

INSULATED PACKAGE

May 2009

6

NOTES FOR STABLE AND SAFE OPERATION ;

•

Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the

stray capacity between the input and output wirings of opto-coupler.

•

Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.

•

Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type.

•

Slow switching opto-coupler: CTR > 100%

•

Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the

power supply.

•

Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N

terminal.

•

Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line

and improve noise immunity of the system.

OUT

Si

OT

GNDGND

In

Vcc

U

V

W

B

N

P

M

→

IF

+

–

: Interface which is the same as the U-phase

OUT

Si

GNDGND

In

Vcc

OUT

Si

GNDGND

In

Vcc

OUT

Si

GNDGND

In

Fo

Vcc

OUT

Si

GNDGND

In

Fo

Vcc

OUT

Si

GND

In

Fo

Vcc

VWP1

WP

VWPC

UN

VN

VN1

WN

VNC

1.5k

Fo

VVP1

VP

VVPC

≥0.1µ

4.7k

1k

≥0.1µ

20k

≥10µ

20k

≥10µ

≥0.1µ

VFo

WFo

UFo

VUP1

UP

VUPC

Br

→

IF

5V

→

IF

→

OUT

Si

GND

In

Fo

Vcc

VD

Fig. 8 Application Example Circuit

PM25RL1A120

PM25RL1A120

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