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PL123-05NSI-R

P1-P3P4-P6P7-P8
PL123-05N/-09N
Low Skew Fanout Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/15/12 Page 1
FEATURES
Output fanout buffer for DC to 134MHz
Output Options:
o 1:5 output fanout with PL123-05
o 1:9 output fanout with PL123-09
Low power consumption for portable applications
Low input-output delay
Output-Output skew less than 250ps
Low Additive Phase Jitter of 60fs RMS
2.5V to 3.3V, ±10% operation
1.8V ±10% operation up to 67MHz
Operating temperature range from -40°C to 85°C
Available in 16-Pin SOP (PL123-09) and 8-Pin
SOP (PL123-05). Both are GREEN/RoHS packag-
es.
DESCRIPTION
The PL123-05N and PL123-09N are a low-cost
fanout buffers for distributing high-speed clocks with
low output to output skew and preserving low noise
properties. The fanout buffers accept an input from
DC to 134MHz and provide 5 or 9 outputs of the same
frequency. A typical PL123-09N application for driving
SDRAM in PC systems would use eight outputs to
drive two DIMMs, or four SO-DIMMs, with the re-
maining output used for driving an external feed-
back to a PLL. A typical PL123-05N application is
to fanout a low noise CMOS clock oscillator to 5
low noise CMOS clocks.
These parts are not intended for 5V input-tolerant ap-
plications.
BLOCK DIAGRAM AND PACKAGE PINOUT
REF
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
1REF
CLK1
CLK2
VDD
CLK9
CLK8
CLK7
VDD
GND
CLK6
CLK5
GND
10
11
12
13
14
15
16
98
7
6
5
4
3
2
VDD
CLK4
CLK3
GND
SOP-16L
REF
CLK1
CLK2
CLK3
CLK4
CLK5
1REF
CLK1
CLK2
GND
CLK5
CLK4
VDD
CLK35
6
7
8
4
3
2
SOP-8L
PL123-05N PL123-09N
PL123-05N/-09N
Low Skew Fanout Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/15/12 Page 2
PIN DESCRIPTIONS
Name
PL123-09N
SOP-16L
PL123-05N
SOP-8L
Type
Description
REF
1
1
I
Input reference frequency.
CLK1
2
2
O
Buffered clock output
CLK2
3
3
O
Buffered clock output
VDD
4, 8, 13
6
P
VDD connection
GND
5, 9, 12
4
P
GND connection
CLK3
6
5
O
Buffered clock output
CLK4
7
7
O
Buffered clock output
CLK5
10
8
O
Buffered clock output
CLK6
11
-
O
Buffered clock output
CLK7
14
-
O
Buffered clock output
CLK8
15
-
O
Buffered clock output
CLK9
16
-
O
Buffered clock output
LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a pe rformance optimized PCB design:
Signal Integrity and Termination
Considerations
- Keep traces short!
- Trace = Inductor. With a capacitive load this equals
ringing!
- Long trace = Transmission Line. Without proper termi-
nation this will cause reflections ( looks like ringing ).
- Design long traces (> 1 inch) as “striplines” or
“microstrips” with defined impedance.
- Match trace at one side to avoid reflections bounc ing
back and forth.
Decoupling and Power Supply
Considerations
- Place decoupling capacitors as close as possible
to the VDD pin(s) to limit noise from the power
supply
- Addition of a ferrite bead in series with VDD can
help prevent noise from other board sources
- Value of decoupling capacitor is frequency de-
pendant. Typical values to use are 0.1F for de-
signs using frequencies < 50MHz and 0.01F for
designs using frequencies > 50MHz.
Typical CMOS termination
Place Series Resistor as close as possible to CMOS output
CMOS Output Buffer
( Typical buffer impedance 20 ohm)
To CMOS Input
Connect a 33 ohm series resistor at each of the output clocks to
enhance the stability of the output signal
50 ohm line
PL123-05N/-09N
Low Skew Fanout Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/15/12 Page 3
ABSOLUTE MAXIMUM CONDITIONS
Supply Voltage to Ground Potential ...... –0.5V to 4.6V
DC Input Voltage ............................ V
SS
– 0.5V to 4.6V
Storage Temperature ..........................–65°C to 150°C
Junction Temperature………………………….. 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015)…………..> 2000V
OPERATING CONDITIONS
Description
Min.
Max.
Unit
Supply Voltage
1.62
3.63
V
Commercial Operating Temperature (ambient temperature)
0
70
C
Industrial Operating Temperature (ambient te mperature)
-40
85
C
Load Capacitance, below 100 MHz, V
DD
> 2.25V
―
30
pF
Load Capacitance, above 100 MHz, V
DD
> 2.25V
―
10
pF
Load Capacitance, below 67MHz, 1.62V < V
DD
< 2.25V
―
15
pF
Input Capacitance
―
7
pF
Operating Frequency, Input=Output, V
DD
> 2.25V
DC
134
MHz
Operating Frequency, Input=Output, 1.62V < V
DD
< 2.25V
DC
67
MHz
Power-up time for all V
DD
s to reach minimum specified voltage
(power ramps must be monotonic)
0.05
50
ms
P1-P3P4-P6P7-P8

PL123-05NSI-R

Mfr. #:
Buy PL123-05NSI-R
Manufacturer:
Microchip Technology / Micrel
Description:
Clock Buffer DC - 134MHz 1:5 Fanout Buffer
Lifecycle:
New from this manufacturer.
Delivery:
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